PM4314 QDSX
DATA SHEET
PMC-950857
ISSUE 5
QUAD T1/E1 LINE INTERFACE DEVICE
Register 010H, 050H, 090H, and 0D0H: CDRC Configuration
Bit
Type
Function
Default
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
AMI
LOS[1]
LOS[0]
DCR
0
0
0
0
0
0
0
0
Reserved
ALGSEL
O162
Reserved
Reserved:
The reserved bits must be programmed with a logic 0
AMI:
The alternate mark inversion (AMI) bit selects the line code of the incoming
E1 or DS1 signal. A logic 1 selects AMI line code; a logic 0 selects HDB3 (E1
format) or B8ZS (DSX-1 format).
LOS[1:0]:
The LOS[1:0] bits select the loss of signal declaration threshold. For
example, if the threshold is set to 10, the 11th consecutive zero causes the
declaration of LOS. LOS is removed when a single non-zero pulse is
detected in the receive stream. The LOS declaration thresholds are shown in
the table below:
LOS[1]
LOS[0]
Threshold (bit periods)
0
0
10 (E1 format selected)
15 (DSX-1 format or AMI line code selected)
0
1
1
1
0
1
31
63
175
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
74
PMC [ PMC-SIERRA, INC ]
