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HDMP-1638G 参数 Datasheet PDF下载

HDMP-1638G图片预览
型号: HDMP-1638G
PDF下载: 下载PDF文件 查看货源
内容描述: [Ethernet Transceiver, 1-Trnsvr, Bipolar, PQFP64,]
分类和应用: 以太网:16GBASE-T电信电信集成电路
文件页数/大小: 18 页 / 266 K
品牌: PMC [ PMC-SIERRA, INC ]
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TRx I/ O Definition (Cont’d.)  
Name  
Pin Type  
Signal  
RX[0]  
RX[1]  
RX[2]  
RX[3]  
RX[4]  
RX[5]  
RX[6]  
RX[7]  
RX[8]  
RX[9]  
45  
44  
43  
41  
40  
39  
38  
36  
35  
34  
O-TTL  
Data Outputs: One 10 bit data byte. RX[0] is the first bit received. RX[0] is the least  
significant bit. When there is a loss of input signal at DINB and RXSEL is high, these  
outputs are held static at logic 1. Refer to SIG_DET (pin 26) pin definition for more  
details.  
RXCAP0  
RXCAP1  
48  
49  
C
Loop Filter Capacitor: A loop filter capacitor for the internal PLL must be connected  
across the RXCAP0 and RXCAP1 pins. (typical value = 0.1 μF)  
TX[0]  
TX[1]  
TX[2]  
TX[3]  
TX[4]  
TX[5]  
TX[6]  
TX[7]  
TX[8]  
TX[9]  
2
3
4
5
6
7
8
9
I-TTL  
Data Inputs: One 10 bit, 8B/10B encoded data byte. TX[0] is the first bit transmitted. TX[0] is  
the least significant bit.  
10  
11  
TXCAP0  
TXCAP1  
17  
16  
C
Loop Filter Capacitor: A loop filter capacitor must be connected across the TXCAP1 and  
pins (typical value=0.1 μF).  
SIG_DET  
26  
O-TTL  
Signal Detect: Indicates a loss of signal on the high-speed differential inputs, DINB, as in  
the case where the transmission cable becomes disconnected.  
If DIN>=200 mV peak-to-peak, SIG_DET=logic 1.  
If DIN<200 mV and DIN>50 mV, SIG_DET=undefined.  
If DIN<=50 mV, SIG_DET=logic 0.  
V _RX  
28  
58  
S
S
S
S
Logic Power Supply: Normally 3.3 volts. Used for internal receiver PECL logic. It should  
be isolated from the noisy TTL supply as well as possible.  
CC  
V _RXA  
CC  
50  
Analog Power Supply: Normally 3.3 volts. Used to provide a clean supply line for the PLL  
and high speed analog cells.  
V _RXHS  
CC  
54  
High Speed Supply: Normally 3.3 volts. Used only for the high speed receiver cell  
(HS_IN). Noise on this line should be minimized for best operation.  
V _RXTTL 29  
CC  
TTL Power Supply: Normally 3.3 volts. Used for all TTL receiver output buffer cells.  
37  
42  
V _TX  
20  
S
S
S
Logic Power Supply: Normally 3.3 volts. Used for internal transmitter PECL logic. Also  
used for all transmitter TTL input buffer cells.  
CC  
V _TXA  
CC  
18  
Analog Power Supply: Normally 3.3 volts. Used to provide a clean supply line for the PLL and  
high speed analog cells.  
V _TXECL 61  
CC  
High Speed ECL Supply: Normally 3.3 volts. Used only for the last stage of the high speed  
transmitter output cell (HS_OUT) as shown in Figure 10. Due to high current transi-tions, this  
V
CC  
should be well bypassed to a ground plane.  
V _TXHS  
CC  
64  
S
High Speed Supply: Normally 3.3 volts. Used by the transmitter side for the high speed  
circuitry. Noise on this line should be minimized for best operation.  
14  
PMC-Sierra, Inc. - Not Recommended for New Designs  
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