O_TTL
V
I_TTL
_TTL
R
V
_TTL
CC
CC
V
_TTL
CC
R
or
_RX
R
R
V
CC
V
1.4 V
BB
R
GND
ESD
PROTECTION
ESD
PROTECTION
GND_TTL
GND_TTL
Figure 9. O-TTL and I-TTL simplified circuit schematic.
HS OUT
HS IN
V
V
CC
CC
V
V
_TXHS
CC
CC
+
–
A
+
_TXECL
–
V
CC
R
R
0.01 µF
+DIN
+DOUT
Zo
R
R
PAD
150
2 * Z0
PAD
Zo
-DOUT
-DIN
0.01 µF
GND
150
GND
ESD
PROTECTION
ESD
PROTECTION
GND_TXHS
GND
NOTES:
1. HS_IN INPUTS SHOULD NEVER BE CONNECTED TO GROUND AS PERMANENT DAMAGE TO THE DEVICE MAY RESULT.
2. THE OPTIONAL SERIES PADDING RESISTORS (R ) HELP DAMPEN LOAD REFLECTIONS. TYPICAL R VALUES FOR
PAD PAD
MISMATCHED LOADS RANGE BETWEEN 25-Z0 Ω.
3. FOR PECL REFCLK INPUT PAIR, THE CONSTANT VOLTAGE SUPPLIES (SHOWN AS A) AND RESISTORS R ARE OMITTED.
Figure 10. HS_OUT and HS_IN simplified circuit schematic.
11
PMC-Sierra, Inc. - Not Recommended for New Designs
PMC [ PMC-SIERRA, INC ]
