TransDimension Inc.
Interfacing TD242LP to Intel StrongArm SA1110 Processor
TransDimension, together with SoftConnex Inc, its wholly owned subsidiary, offer total solutions
including controller chips, reference designs, development kits, firmware for microprocessor
interfacing, HCD (host controller driver), HNP (Host Negotiation Protocol), SRP (Session
Request Protocol) as well as USB Host and Function stacks running under most real time
operating systems.
2. Bus Interface
2.1 Recommendations
For the SA1110, we recommend that:
The TD242LP is interfaced directly to SA1110’s system bus.
The TD242LP is accessed through a SA1110 chip-select for static banks.
Possible candidates are SA1110 chip-selects nCS0 through nCS5, for Static Banks 0 through
Static Bank 5, respectively. Since the TD242LP does not support the RDY pin, assigning
nCS3, nCS4 or nCS5 to the TD242LP is not a requirement. In other words, any of nCS0,
nCS1 and nCS2 can work equally well.
The chosen chip-select is programmed to 16-bit access (unbuffered write and uncached read)
with a bus cycle compatible to that of the TD242LP’s.
Both the SA1110 and the TD242LP operate under the little endian mode.
The above recommendations are assumed throughout this document.
2.2 Hardware Design
This sub-section discusses hardware aspects of interfacing the TD242LP to the SA1110.
Software considerations are presented in Section 2.3.
The following signals of the TD242LP are involved in the bus interfacing.
Operating Mode: TEST
The TEST pin should be grounded for normal operation.
TD242LP Voltage Regulator: ENVREG
If the ENVREG pin is tied to 3.3V, the internal 3.3V-to-2.5V internal voltage regulator is
enabled and the VREG_OUT pin of the TD242LP can be used to drive its VDD2.5 power pins. If
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