PEX 8532 Transparent Mode Port Registers
PLX Technology, Inc.
Note: Register offset 7Ch is used only for downstream ports.
Register 11-28. 7Ch Slot Capabilities (All Ports)
Serial
Default
Bit(s)
Description
Attention Button Present
Ports
Type
EEPROM
Upstream
0
Not valid for the upstream port.
0
0 = Attention Button is not implemented
Downstream
Upstream
HwInit
Yes
Yes
Yes
Yes
1
0
1
0
1
0
1
1 = Attention Button is implemented on the slot chassis of the
corresponding PEX 8532 downstream port
Power Controller Present
Not valid for the upstream port.
1
2
3
0 = Power Controller is not implemented
1 = Power Controller is implemented for the slot of the
corresponding PEX 8532 downstream port
Downstream
Upstream
HwInit
HwInit
HwInit
MRL Sensor Present
Not valid for the upstream port.
0 = MRL Sensor is not implemented
1 = MRL Sensor is implemented on the slot chassis of the
corresponding PEX 8532 downstream port
Downstream
Upstream
Attention Indicator Present
Not valid for the upstream port.
0 = Attention Indicator is not implemented
1 = Attention Indicator is implemented on the slot chassis
of the corresponding PEX 8532 downstream port
Downstream
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ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6
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