PEX 8532 Transparent Mode Port Registers
PLX Technology, Inc.
Register 11-18. 44h Power Management Status and Control (All Ports) (Cont.)
Serial
Default
Bit(s)
Description
Type
EEPROM
Power Management Control/Status Bridge Extensions
21:16 Reserved
0-0h
B2/B3 Support
Cleared to 0, as required by the PCI Power Mgmt. r1.1.
22
23
RO
RO
No
No
0
0
Bus Power/Clock Control Enable
Cleared to 0, as required by the PCI Power Mgmt. r1.1.
Power Management Data
Data
RW by Serial EEPROM mode onlyb.
There are four internal Data registers per port.
Bits [12:9], Data Select, select the Data register.
31:24
RO
Yes
00h
a. Because the PEX 8532 does not support auxiliary power, this bit is not sticky, and is always cleared to 0
at power-on reset.
b. With no serial EEPROM, reads return 00h for the Data Scale and Data registers (for all Data Selects).
170
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6
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