Chapter 10 Power Management
Power Management Capability
10.1
The PEX 8532 Power Management (PM) module interfaces with chip sections to reduce power
consumption. The PEX 8532 supports:
• Link Power Management States (L-States)
– PCI Bus Power Management – L0, L1, L2/L3 Ready, and L3
(Auxiliary power is not supported)
– Active State Power Management – L0s and L1
• Device Power Management State (D-States) – D0 (D0_uninitialized and D0_active)
and D3 (D3hot and D3cold) support
• Power Management Event (PME) support from D3hot
• Power Management Event due to Hot Plug events
• Downstream ports generate and forward PME_Turn_Off broadcast messages
• Implements PCI Power Mgmt. r1.1
Note: Because the PEX 8532 does not support AUX-Power, PME generation from D3cold
is not supported.
The PM module interfaces with the Physical Layer electrical sub-block to transition the Link state into
low-power states when the module receives a Power State Change request from an upstream component,
or an internal event forces the Link State entry into low-power states in Hardware-Autonomous PM
(Active Link State PM) mode. PCI Express Link states are not directly visible to Conventional PCI Bus
driver software; instead, they are derived from the Power Management state of the components residing
on those links. A functional block diagram of the PEX 8532’s Power Management Controller is
illustrated in Figure 10-1.
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6
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