Chapter 6 Interrupts
6.1
Interrupt Support
The PEX 8532 supports the PCI Express interrupt model, which uses two mechanisms:
• INTx emulation
• Message Signaled Interrupt (MSI)
For Conventional PCI compatibility, the PCI INTx emulation mechanism is used to signal interrupts to
the System Interrupt Controller. This mechanism is compatible with existing PCI software, provides the
same level of service as the corresponding PCI interrupt signaling mechanism, and is independent of
System Interrupt Controller specifics. The PCI INTx emulation mechanism virtualizes PCI physical
Interrupt signals by using an in-band signaling mechanism.
In addition to PCI INTx-compatible interrupt emulation, the PEX 8532 supports the Message Signaled
Interrupt (MSI) mechanism. The PCI Express MSI mechanism is compatible with the MSI Capability
defined in the PCI r2.3.
The following events are supported for interrupts:
• Hot Plug
– Attention Button Pressed
– Power Fault Detected
– MRL Sensor Changed
– Presence Detect Changed
– Command Completed
• Device-specific errors
– ECC Error detected in internal packet RAM
– Ingress Credit Underrun
– Internal Error FIFO Overflow
6.1.1
PEX 8532 Interrupt Handling
The PEX 8532 provides an Interrupt Generation module with each port. The module reads the request
for interrupts from different sources and generates an MSI or PCI-compatible Assert_INTx/
Deassert_INTx Interrupt message. The MSI supports a PCI Express edge-triggered interrupt, whereas
Assert_INTx and Deassert_INTx Message transactions emulate PCI level-triggered interrupt signaling.
The System Interrupt Controller functions include:
• Sensing Interrupt events
• Signaling the interrupt, by way of the INTx mechanism, and setting the Interrupt Status bit
• Signaling interrupt by way of the MSI mechanism
• Handling INTx-type Interrupt messages from downstream devices
ExpressLane PEX 8532AA/BA/BB/BC 8-Port/32-Lane Versatile PCI Express Switch Data Book
Copyright © 2007 by PLX Technology, Inc. All Rights Reserved – Version 1.6
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