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g
V
V
V
V
V
V
V
V
CLK_OUT
11
DDX
12
SSX
15
ADCP DDA2
DDI
27
REF
38
DDE
6
DDA1
39
32
37
13
14
XTALIN
CLOCK AND
TIMING
XTAL
XTALOUT
34
36
40
42
44
VINL
VINR
VOUTL
VOUTR
MUTE
DAC
DAC
ADC
ADC
AUDIO
FEATURE
PROCESSOR
AUDIO
FEATURE
PROCESSOR
INTER-
POLATOR SHAPER
NOISE
COMB
FILTER MATOR
DECI-
16
43
2
RESET
RTCB
WSI
INPUT
AND
OUTPUT
SELECT
9
8
WSO
3
DATAI
BCKI
DATAO
BCKO
DATA IN
DATA OUT
1
10
SLICER
23
24
25
26
SPDIF0
SPDIF1
SPDIF2
SPDIF3
IEC 60958
DECODER
IEC 60958
ENCODER
5
SPDIFOUT
21
22
4
SLICER_SEL0
SLICER_SEL1
LOCK
UDA1355H
CONTROL
INTERFACE
33
35
28
29 30 31
20
17 18 19
7
41
MGU826
V
V
SSIS
MODE0
MODE2
V
V
SSA1
MP0
MP2
MP1 SEL_STATIC
ADCN
SSE
V
MODE1
SSA2
Fig.1 Block diagram.
NXP [ NXP ]
