Philips Semiconductors
Product specification
Multimedia bridge, high performance
Scaler and PCI circuit (SPCI)
SAA7146A
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Ci
input pin capacitance
CLK pin capacitance
IDSEL pin capacitance
−
5
−
−
10
12
8
pF
pF
pF
CCLK
CIDSEL
−
−
note 7
AC SPECIFICATION
IOH
switching current HIGH
0 < Vo ≤ 1.4;
note 8
−44
−
−
−
−
mA
mA
1.4 < Vo < 2.4;
note 8
(Vo – 1.4)
– 44 +
---------------------------
0.024
3.1 < Vo < VDDD
note 8
;
−
−
−
−
−
−
−
−
−
note 9
test point
Vo = 3.1 V;
notes 9 and 10
−
−142
mA
mA
mA
IOL
switching current LOW
Vo > 2.2 V;
note 8
95
−
2.2 > Vo > 0.55;
note 8
Vo/0.023
−
0.71 > Vo > 0;
note 8
−
−
1
1
note 10
test point
Vo = 0.71 V;
notes 9 and 10
206
5
mA
tslew(r)
tslew(f)
output rise slew rate
output fall slew rate
0.4 to 2.4 V;
note 11
V/ns
V/ns
2.4 to 0.4 V;
note 11
5
Timing parameters
tval
CLK to signal valid delay
(bussed signals)
see note 12 and
Fig.48
2
−
−
−
−
−
−
11
12
−
ns
ns
ns
ns
ns
ns
tval(ptp)
ton
CLK to signal valid delay
(point-to-point)
see note 12 and
Fig.48
2
float to active delay
see note 13 and
Fig.48
2
toff
active to float delay
see note 13 and
Fig.48
−
28
−
tsu
input set-up time to CLK
(bussed signal)
see note 12 and
Fig.48
7
tsu(ptp)
input set-up time to CLK
(point-to-point)
see note 12
and Fig.48
10, 12
−
th
input hold time from CLK
see Fig.48
0
−
−
−
−
ns
µs
ns
trst(CLK)
trst(off)
reset active time after CLK stable note 14
100
−
−
reset active to output float delay
notes 13,
14 and 15
40
1998 Apr 09
135
NXP [ NXP ]
