SAA7113H
Philips Semiconductors
9-bit video input processor
9.2 I2C-bus register description
Table 24: Register subaddresses map
Subaddress
00h
Description
chip version
front-end part
Access
R
Reference
Section 9.2.1
01h to 05h
R/W
Section 9.2.2 to
Section 9.2.6
06h to 13h
decoder part
R/W
R/W
Section 9.2.7 to
Section 9.2.20
14h
reserved
15h to 17h
decoder part
Section 9.2.21 to
Section 9.2.23
18h to 1Eh
1Fh
reserved
video decoder status byte
reserved
R
Section 9.2.24
20h to 3Fh
40h to 5Eh
general purpose data slicer
R/W
Section 9.2.25 to
Section 9.2.31
5Fh
reserved
60h to 62h
general purpose data slicer status
R
Section 9.2.32 to
Section 9.2.34
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© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 02 — 9 May 2005
34 of 75