PCF8566
NXP Semiconductors
Universal LCD driver for low multiplex rates
8.3 Command decoder
The command decoder identifies command bytes that arrive on the I2C-bus. All available
commands carry a continuation bit C in their most significant bit position as shown in
Figure 18. When this bit is set, it indicates that the next byte of the transfer to arrive will
also represent a command. If this bit is reset, it indicates that the command byte is the last
in the transfer. Further bytes will be regarded as display data.
The five commands available to the PCF8566 are defined in Table 8.
MSB
LSB
C
REST OF OPCODE
msa833
(1) C = 0; last command.
(2) C = 1; commands continue.
Fig 18. General format of byte command
Table 8.
Definition of PCF8566 commands
Command
Opcode
Reference
Description
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Mode set
C
1
0
LP
E
B
M1
M0
Section 8.3.1 defines LCD drive mode, LCD bias
configuration, display status and
power dissipation mode
Load data
pointer
C
C
C
0
1
1
0
1
1
P4
0
P3
0
P2
A2
0
P1
A1
I
P0
A0
O
Section 8.3.2 data pointer to define one of 24
display RAM addresses
Device select
Section 8.3.3 define one of eight hardware
subaddresses
Bank select
1
1
Section 8.3.4 bit I: defines input bank selection
(storage of arriving display data);
bit O: defines output bank selection
(retrieval of LCD display data)
Blink
C
1
1
1
0
A
BF1 BF0 Section 8.3.5 defines the blink frequency and blink
mode
8.3.1 Mode set command
Table 9.
LCD drive mode command bit description
LCD drive mode
Bit
M1
0
Drive mode
Backplane
BP0
M0
1
static
1:2
BP0, BP1
1
0
1:3
BP0, BP1. BP2
BP0, BP1. BP2, BP3
1
1
1:4
0
0
PCF8566_7
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 07 — 25 February 2009
24 of 48
NXP [ NXP ]
