PCF8566
NXP Semiconductors
Universal LCD driver for low multiplex rates
11. Static characteristics
Table 19. Static characteristics
VSS = 0 V; VDD = 2.5 V to 6.0 V; VLCD = VDD − 2.5 V to VDD − 6.0 V; Tamb = −40 °C to +85 °C; unless otherwise specified.
Symbol
Supplies
VDD
Parameter
Conditions
Min
Typ
Max
Unit
supply voltage
2.5
-
6.0
V
VLCD
LCD supply voltage
supply current:
V
DD − 6.0
-
V
DD − 2.5
V
[1]
[1]
IDD
fclk = 200 kHz
VDD = 3.5 V;
-
30
15
90
40
µA
µA
IDD(lp)
low-power mode supply current
-
V
LCD = 0 V;
f
clk = 35 kHz;
A0 to A2 tied to
VSS
Logic
Vi
input voltage
V
SS − 0.5
-
-
-
-
VDD + 0.5
0.3VDD
VDD
V
VIL
LOW-level input voltage
HIGH-level input voltage
LOW-level output current
VSS
V
VIH
IOL
0.7VDD
−1
V
on pins CLK and
SYNC;
-
mA
V
V
OL = 1.0 V;
DD = 5.0 V
IL
leakage current
on pins SA0, CLK,
OSC, A0 to A2;
VI = VDD or VSS
−1
-
+1
µA
IOH(CLK)
Ipd
HIGH-level output current on pin
CLK
VOH = 4.0 V;
-
-
+1
mA
V
DD = 5.0 V
pull-down current
on pins OSC and
A0 to A2;
15
50
150
µA
VI = 1.0 V;
V
DD = 5.0 V
RPU
VPOR
CI
pull-up resistance
power-on reset voltage
input capacitance
on pin SYNC
15
-
25
1.3
-
60
2
kΩ
V
[2]
[3]
-
7
pF
I2C-bus; pins SDA and SCL
Vi
input voltage
VSS − 0.5
-
6
V
VIL
VIH
IL
LOW-level input voltage
HIGH-level input voltage
leakage current
VSS
0.7VDD
−1
-
0.3VDD
V
-
6
V
VI = VDD or VSS
VOL = 0.4 V;
0
-
+1
-
µA
mA
IOL
LOW-level output current
−3
V
DD = 5.0 V
[3]
CI
input capacitance
spike pulse width
-
-
-
-
7
pF
ns
tw(spike)
on bus
100
PCF8566_7
© NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 07 — 25 February 2009
28 of 48
NXP [ NXP ]
