PCA9675
NXP Semiconductors
Remote 16-bit I/O expander for Fm+ I2C-bus with interrupt
8.4 Power-on reset
When power is applied to VDD, an internal Power-On Reset (POR) holds the PCA9675 in
a reset condition until VDD has reached VPOR. At that point, the reset condition is released
and the PCA9675 registers and I2C-bus/SMBus state machine will initialize to their default
states. Thereafter VDD must be lowered below 0.2 V to reset the device.
8.5 Interrupt output (INT)
The PCA9675 provides an open-drain interrupt (INT) which can be fed to a corresponding
input of the microcontroller (see Figure 15, Figure 16, and Figure 17). This gives these
chips a kind of master function which can initiate an action elsewhere in the system.
An interrupt is generated by any rising or falling edge of the port inputs. After time t(v)D the
signal INT is valid.
The interrupt disappears when data on the port is changed to the original setting or data is
read from or written to the device which has generated the interrupt.
In the write mode, the interrupt may become deactivated (HIGH) on the rising edge of the
write to port pulse. On the falling edge of the write to port pulse the interrupt is definitely
deactivated (HIGH).
The interrupt is reset in the read mode on the rising edge of the read from port pulse.
During the resetting of the interrupt itself, any changes on the I/Os may not generate an
interrupt. After the interrupt is reset any change in I/Os will be detected and transmitted as
an INT.
V
DD
device 1
device 2
device 8
PCA9675
PCA9675
PCA9675
MICROCOMPUTER
INT
INT
INT
INT
002aab635
Fig 17. Application of multiple PCA9675s with interrupt
PCA9675
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© NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 2 — 3 October 2011
16 of 34
NXP [ NXP ]
