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P87C552SBAA 参数 Datasheet PDF下载

P87C552SBAA图片预览
型号: P87C552SBAA
PDF下载: 下载PDF文件 查看货源
内容描述: 80C51的8位微控制器8K / 256 OTP , 8通道10位A / D , I2C , PWM ,捕获/比较,高I / O,低电压2.7V.5.5V ,低功耗 [80C51 8-bit microcontroller 8K/256 OTP, 8 channel 10 bit A/D, I2C, PWM, capture/compare, high I/O, low voltage 2.7V.5.5V, low power]
分类和应用: 微控制器和处理器外围集成电路可编程只读存储器时钟
文件页数/大小: 74 页 / 370 K
品牌: NXP [ NXP ]
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Philips Semiconductors  
Preliminary specification  
80C51 8-bit microcontroller  
8K/256 OTP, 8 channel 10 bit A/D, I2C, PWM,  
capture/compare, high I/O, low voltage (2.7V–5.5V), low power  
P87C552  
7
6
5
4
3
2
1
0
Reset Value = C0H  
STE (EEH)  
TG47  
(MSB)  
TG46  
SP45  
SP44  
SP43  
SP42  
SP41  
SP40  
(LSB)  
BIT  
SYMBOL FUNCTION  
STE.7  
STE.6  
STE.5  
STE.4  
STE.3  
STE.2  
STE.1  
STE.0  
TG47  
TG46  
SP45  
SP44  
SP43  
SP42  
SP41  
SP40  
Toggle flip-flops  
Toggle flip-flops  
If “1” then P4.5 is set on a match between CM0 and Timer T2  
If “1” then P4.4 is set on a match between CM0 and Timer T2  
If “1” then P4.3 is set on a match between CM0 and Timer T2  
If “1” then P4.2 is set on a match between CM0 and Timer T2  
If “1” then P4.1 is set on a match between CM0 and Timer T2  
If “1” then P4.0 is set on a match between CM0 and Timer T2  
SU01087  
Figure 15. Set Enable Register (STE)  
Reset Value = 00H  
7
6
5
4
3
2
1
0
TM2IR (C8H) T2OV  
CMI2  
CMI1  
CMI0  
CTI3  
CTI2  
CTI1  
CTI0  
(LSB)  
(MSB)  
BIT  
SYMBOL FUNCTION  
TM2IR.7  
TM2IR.6  
TM2IR.5  
TM2IR.4  
TM2IR.3  
TM2IR.2  
TM2IR.1  
TM2IR.0  
T2OV  
CMI2  
CMI1  
CMI0  
CTI3  
CTI2  
CTI1  
CTI0  
Timer T2 16-bit overflow interrupt flag  
CM2 interrupt flag  
CM1 interrupt flag  
CM0 interrupt flag  
CT3 interrupt flag  
CT2 interrupt flag  
CT1 interrupt flag  
CT0 interrupt flag  
Interrupt Flag Register (TM2IR)  
7
6
5
4
3
2
1
0
Reset Value = 00H  
IP1 (F8H)  
PT2  
PCM2  
PCM1  
PCM0  
PCT3  
PCT2  
PCT1  
PCT0  
(LSB)  
(MSB)  
BIT  
SYMBOL FUNCTION  
IP1.7  
IP1.6  
IP1.5  
IP1.4  
IP1.3  
IP1.2  
IP1.1  
IP1.0  
PT2  
Timer T2 overflow interrupt(s) priority level  
Timer T2 comparator 2 interrupt priority level  
Timer T2 comparator 1 interrupt priority level  
Timer T2 comparator 0 interrupt priority level  
Timer T2 capture register 3 interrupt priority level  
Timer T2 capture register 2 interrupt priority level  
Timer T2 capture register 1 interrupt priority level  
Timer T2 capture register 0 interrupt priority level  
PCM2  
PCM1  
PCM0  
PCT3  
PCT2  
PCT1  
PCT0  
Timer 2 Interrupt Priority Register (IP1)  
SU01088  
Figure 16. Interrupt Flag Register (TM2IR) and Timer T2 Interrupt Priority Register (IP1)  
19  
1999 Mar 30  
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