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ISP1581BD 参数 Datasheet PDF下载

ISP1581BD图片预览
型号: ISP1581BD
PDF下载: 下载PDF文件 查看货源
内容描述: 通用串行总线2.0高速接口设备 [Universal Serial Bus 2.0 high-speed interface device]
分类和应用: 总线控制器微控制器和处理器外围集成电路数据传输时钟
文件页数/大小: 73 页 / 1657 K
品牌: PHILIPS [ NXP SEMICONDUCTORS ]
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Philips Semiconductors
ISP1581
USB 2.0 HS interface device
Pin description for LQFP64
…continued
Pin
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
Type
[2]
I/O
I/O
I/O
-
-
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
-
O
Description
bit 7 of multiplexed address/data
bit 0 of bidirectional data
bit 1 of bidirectional data
digital ground
supply voltage (3.3 or 5.0 V)
bit 2 of bidirectional data
bit 3 of bidirectional data
bit 4 of bidirectional data
bit 5 of bidirectional data
bit 6 of bidirectional data
bit 7 of bidirectional data
bit 8 of bidirectional data
bit 9 of bidirectional data
bit 10 of bidirectional data
bit 11 of bidirectional data
bit 12 of bidirectional data
bit 13 of bidirectional data
bit 14 of bidirectional data
bit 15 of bidirectional data
supply voltage (3.3 V
±
10%); supplies internal digital
circuits
crystal oscillator output (12 MHz); connect a fundamental
parallel-resonant crystal; leave this pin open when using an
external clock source on pin XTAL1
crystal oscillator input (12 MHz); connect a fundamental
parallel-resonant crystal or an external clock source
(leaving pin XTAL2 unconnected)
digital ground
wake-up input (edge triggered); a LOW-to-HIGH transition
generates a remote wake-up from ‘suspend’ state
’suspend’ state indicator output (4 mA); used as a power
switch control output (active LOW) for powered-off
application or as a resume signal to the CPU (active HIGH)
for powered-on application
supply voltage (3.3 or 5.0 V)
Table 2:
Symbol
[1]
AD7
DATA0
DATA1
DGND
V
CC(5.0)
DATA2
DATA3
DATA4
DATA5
DATA6
DATA7
DATA8
DATA9
DATA10
DATA11
DATA12
DATA13
DATA14
DATA15
V
CC(3.3)
XTAL2
XTAL1
60
I
DGND
WAKEUP
SUSPEND
61
62
63
-
I
O
V
CC(5.0)
[1]
[2]
64
-
Symbol names with an overscore (e.g. NAME) represent active LOW signals.
All outputs and I/O pins can source 4 mA of current.
7. Functional description
The ISP1581 is a high-speed USB device controller. It implements the USB 2.0/1.1
physical layer, the packet protocol layer and maintains up to 16 USB endpoints
concurrently (2 control, 14 configurable).
USB Chapter 9
protocol handling is
executed by means of external firmware.
9397 750 07648
© Philips Electronics N.V. 2000. All rights reserved.
Objective specification
Rev. 02 — 23 October 2000
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