ISP1362
Single-chip USB OTG controller
Philips Semiconductors
Table 58: HcRhDescriptorB register: bit description
Bit
Symbol
Description
31 to 19
18 to 16
-
reserved
PPCM[2:0] PortPowerControlMask: Each bit indicates whether a port is
affected by a global power control command when
PowerSwitchingMode is set. When set, the power state of the port
is only affected by per-port power control (Set/ClearPortPower).
When cleared, the port is controlled by the global power switch
(Set/ClearGlobalPower). If the device is configured to global
switching mode (PowerSwitchingMode = 0), this field is not valid.
Bit 2 — Ganged-power mask on port 2
Bit 1 — Ganged-power mask on port 1
Bit 0 — reserved
15 to 3
2 to 0
-
reserved
DR[2:0]
DeviceRemovable: Each bit is dedicated to a port of the Root
Hub. When cleared, the attached device is removable. When set,
the attached device is not removable.
Bit 2 — Device attached to port 2
Bit 1 — Device attached to port 1
Bit 0 — reserved
15.3.3 HcRhStatus register (R/W: 14H/94H)
The HcRhStatus register is divided into two parts. The lower word of a DWord
represents the Hub Status field and the upper word represents the Hub Status
Change field. Reserved bits should always be written as logic 0. See Table 59 for bit
allocation of the register.
Code (Hex): 14 — read
Code (Hex): 94 — write
Table 59: HcRhStatus register: bit allocation
Bit
31
CRWE
0
30
29
28
27
26
25
24
Symbol
Reset
Access
Bit
reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
W
23
22
21
20
19
18
17
CCIC
0
16
Symbol
Reset
Access
Bit
reserved
LPSC
0
-
-
-
-
-
-
-
-
-
-
-
-
R/W
9
R/W
8
15
14
13
12
11
10
Symbol
Reset
Access
DRWE
0
reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
R/W
9397 750 12337
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 06 January 2004
85 of 150
NXP [ NXP ]
