ISP1362
Single-chip USB OTG controller
Philips Semiconductors
15.3.4 HcRhPortStatus[1:2] register (R/W [1]: 15H/95H; [2]: 16H/96H)
The HcRhPortStatus[1:2] register is used to control and report port events on a
per-port basis. NumberDownstreamPorts represents the number of HcRhPortStatus
registers that are implemented in hardware. The lower word is used to reflect the port
status, whereas the upper word reflects the status change bits. Some status bits are
implemented with special write behavior. If a transaction (token through handshake)
is in progress when a write to change port status occurs, the resulting port status
change must be postponed until the transaction completes. Reserved bits should
always be written logic 0. The bit allocation of the HcRhPortStatus[1:2] register is
given in Table 61.
Code (Hex): [1] = 15, [2] = 16 — read
Code (Hex): [1] = 95, [2] = 96 — write
Table 61: HcRhPortStatus[1:2] register: bit allocation
Bit
31
30
29
28
27
26
25
24
Symbol
Reset
Access
Bit
reserved
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
23
22
21
20
19
18
17
16
Symbol
Reset
Access
Bit
reserved
PRSC
0
OCIC
0
PSSC
0
PESC
0
CSC
0
-
-
-
-
-
-
R/W
12
R/W
11
R/W
10
R/W
9
R/W
8
15
14
13
Symbol
Reset
Access
Bit
reserved
LSDA
0
PPS
0
-
-
-
-
-
-
-
-
-
-
-
-
3
R/W
1
R/W
0
7
6
5
4
2
Symbol
Reset
Access
reserved
PRS
0
POCI
0
PSS
0
PES
0
CCS
0
-
-
-
-
-
-
R/W
R/W
R/W
R/W
R/W
9397 750 12337
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.
Product data
Rev. 03 — 06 January 2004
87 of 150
NXP [ NXP ]
