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ISP1362BD 参数 Datasheet PDF下载

ISP1362BD图片预览
型号: ISP1362BD
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片通用串行总线- The-Go的控制器 [Single-chip Universal Serial Bus On-The-Go controller]
分类和应用: 控制器
文件页数/大小: 150 页 / 621 K
品牌: NXP [ NXP ]
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ISP1362  
Single-chip USB OTG controller  
Philips Semiconductors  
15.3 HC Root Hub registers  
All registers included in this partition are dedicated to the USB Root Hub, which is an  
integral part of the HC although it is a functionally a separate entity. The HCD  
emulates USB Driver (USBD) accesses to the Root Hub by using a register interface.  
The HCD maintains many USB-dened hub features that are not required to be  
supported in hardware. For example, the Hubs device, Conguration, Interface and  
Endpoint Descriptors are maintained only in the HCD, as well as some static elds of  
the Class Descriptor. The HCD also maintains and decodes the address of the Root  
Hub device and other trivial operations that are better suited to software than to  
hardware.  
Root Hub registers are developed to maintain the similarity of bit organization and  
operation to typical hubs found in the system.  
Four registers are dened as follows:  
HcRhDescriptorA  
HcRhDescriptorB  
HcRhStatus  
HcRhPortStatus[1:NDP].  
Each register is read and written as a DWord. These registers are only written during  
initialization to correspond with the system implementation. The HcRhDescriptorA  
and HcRhDescriptorB registers should be implemented such that they are writeable,  
regardless of the USB states of the HC. HcRhStatus and HcRhPortStatus must be  
writeable during the USBOperational state.  
15.3.1 HcRhDescriptorA register (R/W: 12H/92H)  
The HcRhDescriptorA register is the rst register of two describing the characteristics  
of the Root Hub. The bit allocation is given in Table 55.  
Code (Hex): 12 read  
Code (Hex): 92 write  
Table 55: HcRhDescriptorA register: bit description  
Bit  
31  
30  
29  
28  
27  
26  
25  
24  
Symbol  
Reset  
Access  
Bit  
POTPGT[7:0]  
1
1
1
1
1
1
1
1
R/W  
23  
R/W  
22  
R/W  
21  
R/W  
20  
R/W  
19  
R/W  
18  
R/W  
17  
R/W  
16  
Symbol  
Reset  
Access  
Bit  
reserved  
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
15  
14  
13  
12  
11  
10  
DT  
0
9
8
Symbol  
Reset  
Access  
reserved  
NOCP  
0
OCPM  
1
NPS  
0
PSM  
1
-
-
-
-
-
-
R/W  
R/W  
R
R/W  
R/W  
9397 750 12337  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 03 06 January 2004  
82 of 150  
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