欢迎访问ic37.com |
会员登录 免费注册
发布采购

ISP1362BD 参数 Datasheet PDF下载

ISP1362BD图片预览
型号: ISP1362BD
PDF下载: 下载PDF文件 查看货源
内容描述: 单芯片通用串行总线- The-Go的控制器 [Single-chip Universal Serial Bus On-The-Go controller]
分类和应用: 控制器
文件页数/大小: 150 页 / 621 K
品牌: NXP [ NXP ]
 浏览型号ISP1362BD的Datasheet PDF文件第9页浏览型号ISP1362BD的Datasheet PDF文件第10页浏览型号ISP1362BD的Datasheet PDF文件第11页浏览型号ISP1362BD的Datasheet PDF文件第12页浏览型号ISP1362BD的Datasheet PDF文件第14页浏览型号ISP1362BD的Datasheet PDF文件第15页浏览型号ISP1362BD的Datasheet PDF文件第16页浏览型号ISP1362BD的Datasheet PDF文件第17页  
ISP1362  
Single-chip USB OTG controller  
Philips Semiconductors  
8. Functional description  
8.1 On-The-Go (OTG) controller  
The OTG Controller provides all the control, monitoring and switching functions  
required in OTG operations.  
8.2 Advanced Philips Slave Host Controller (PSHC)  
The advanced Philips Slave HC is designed for highly optimized USB host  
functionality. Many advanced features are integrated to fully utilize the USB  
bandwidth. A number of tasks are performed at the hardware level. This reduces the  
requirement on the microprocessor and thus speeds up the system.  
8.3 Philips Device Controller (DC)  
The Philips DC is a high performance USB device with up to 14 programmable  
endpoints. These endpoints can be congured as double-buffered endpoints to  
further enhance the throughput.  
8.4 Phase-Locked Loop (PLL) clock multiplier  
A 12 MHz-to-48 MHz clock multiplier PLL is integrated on-chip. This allows the use of  
a low-cost 12 MHz crystal that also minimizes Electro-Magnetic Interference (EMI)  
because of low frequency. No external components are required for the operation of  
PLL.  
8.5 USB and OTG transceivers  
The integrated transceivers (for typical downstream port) directly interface to the USB  
connectors (type A) and cables through some termination resistors. The transceiver  
is compliant with Universal Serial Bus Specication Rev 2.0.  
8.6 Overcurrent protection  
The ISP1362 has a built-in overcurrent protection circuitry. This feature monitors the  
current drawn on the downstream VBUS and switches off VBUS when the current  
exceeds the current threshold. The built-in overcurrent protection feature can be used  
when the port acts as a host port.  
8.7 Bus interface  
The bus interface connects the microprocessor to the USB host and the USB device  
allowing fast and easy access to both.  
8.8 DC and HC buffer memory  
4096 bytes (host) and 2462 bytes (device) of built-in memory provide sufcient space  
for the buffering of USB trafc. Memory in the HC is addressable by using the fast and  
versatile direct addressing method.  
9397 750 12337  
© Koninklijke Philips Electronics N.V. 2004. All rights reserved.  
Product data  
Rev. 03 06 January 2004  
13 of 150  
 复制成功!