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ISP1160BD 参数 Datasheet PDF下载

ISP1160BD图片预览
型号: ISP1160BD
PDF下载: 下载PDF文件 查看货源
内容描述: 嵌入式通用串行总线主控制器 [Embedded Universal Serial Bus Host Controller]
分类和应用: 总线控制器微控制器和处理器外围集成电路数据传输时钟
文件页数/大小: 88 页 / 1864 K
品牌: NXP [ NXP ]
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ISP1160  
Embedded USB Host Controller  
Philips Semiconductors  
To re-enable the interrupt generation:  
1. Set all bits in the HcµPInterrupt register.  
2. Set the InterruptPinEnable bit to logic 1.  
Remark: The InterruptPinEnable bit in the HcHardwareConfiguration register latches  
the interrupt output. When this bit is set to logic 0, the interrupt output will remain  
unchanged, regardless of any operations on the interrupt control registers.  
If INT1 is asserted, and the Host Controller Driver (HCD) wishes to temporarily mask  
off the INT signal without clearing the HcµPInterrupt register, the following procedure  
should be followed:  
1. Make sure that the InterruptPinEnable bit is set to logic 1.  
2. Clear all bits in the HcµPInterruptEnable register.  
3. Set the InterruptPinEnable bit to logic 0.  
To re-enable the interrupt generation:  
1. Set all bits in the HcµPInterruptEnable register according to the HCD  
requirements.  
2. Set the InterruptPinEnable bit to logic 1.  
9. Host Controller (HC)  
9.1 HC’s four USB states  
The ISP1160’s USB HC has four USB states—USBOperational, USBReset,  
USBSuspend and USBResume—that define the HC’s USB signalling and bus states  
responsibilities. The signals are visible to the Host Controller Driver (HCD) via the  
ISP1160 USB HC’s control registers.  
9397 750 11371  
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.  
Product data  
Rev. 04 — 04 July 2003  
16 of 88  
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