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ISP1160BD 参数 Datasheet PDF下载

ISP1160BD图片预览
型号: ISP1160BD
PDF下载: 下载PDF文件 查看货源
内容描述: 嵌入式通用串行总线主控制器 [Embedded Universal Serial Bus Host Controller]
分类和应用: 总线控制器微控制器和处理器外围集成电路数据传输时钟
文件页数/大小: 88 页 / 1864 K
品牌: NXP [ NXP ]
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ISP1160  
Embedded USB Host Controller  
Philips Semiconductors  
Figure 12 shows these four interrupt configuration modes. They are programmable  
through the HcHardware Configuration register (see Section 10.4.1), which is also  
used to disable or enable the signals.  
clear or disable INT  
INT active  
INT  
INT  
Mode 0 level triggered, active LOW  
clear or disable INT  
INT active  
Mode 1 level triggered, active HIGH  
INT active  
INT  
INT  
166 ns  
Mode 2 edge triggered, active LOW  
INT active  
MGT944  
166 ns  
Mode 3 edge triggered, active HIGH  
Fig 12. Interrupt pin operating modes.  
8.6.2 Interrupt output pin (INT)  
To program the four configuration modes of the HC’s interrupt output signal (INT), set  
InterruptPinTrigger and InterruptOutputPolarity (bits 1 and 2) of the  
HcHardwareConfiguration register (20H to read, A0H to write). InterruptPinEnable  
(bit 0) is used as the master enable setting for pin INT.  
INT has many associated interrupt events as shown as in Figure 13.  
9397 750 11371  
© Koninklijke Philips Electronics N.V. 2003. All rights reserved.  
Product data  
Rev. 04 — 04 July 2003  
14 of 88  
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