HEF4017B-Q100
NXP Semiconductors
5-stage Johnson decade counter
Table 7.
Dynamic characteristics …continued
Tamb = 25 C; VSS = 0 V; for test circuit see Figure 10
Symbol Parameter
Conditions
VDD
5 V
Extrapolation formula[1]
Min Typ Max Unit
tW
pulse width
CP0 input LOW;
minimum width;
see Figure 8
80
40
30
80
40
30
50
30
20
60
30
20
6
40
20
15
40
20
15
25
15
10
30
15
10
12
30
30
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
ns
10 V
15 V
5 V
ns
ns
CP1 input HIGH;
minimum width;
see Figure 8
ns
10 V
15 V
5 V
ns
ns
MR input HIGH;
minimum width;
see Figure 8
ns
10 V
15 V
5 V
ns
ns
trec
recovery time
MR input;
see Figure 8
ns
10 V
15 V
5 V
ns
ns
fmax
maximum
frequency
see Figure 8
MHz
MHz
MHz
10 V
15 V
12
15
[1] The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF).
[2] tt is the same as tTHL and tTLH
.
Table 8.
Dynamic power dissipation PD
PD can be calculated from the formulas shown. VSS = 0 V; tr = tf 20 ns; Tamb = 25 C.
Symbol
Parameter
VDD
5 V
Typical formula for PD (W)
PD = 500 fi + (fo CL) VDD
where:
2
PD
dynamic power
dissipation
fi = input frequency in MHz;
fo = output frequency in MHz;
2
2
10 V
15 V
PD = 2200 fi + (fo CL) VDD
PD = 6000 fi + (fo CL) VDD
CL = output load capacitance in pF;
DD = supply voltage in V;
(CL fo) = sum of the outputs.
V
HEF4017B_Q100
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© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 4 June 2014
9 of 18
NXP [ NXP ]
