HEF4017B-Q100
NXP Semiconductors
5-stage Johnson decade counter
12. Application information
Some examples of applications for the HEF4017B-Q100 are:
• Decade counter with decimal decoding
• 1 out of n decoding counter (when cascaded)
• Sequential controller
• Timer
Figure 11 shows a technique for extending the number of decoded output states for the
HEF4017B-Q100. Decoded outputs are sequential within each stage and from stage to
stage, with no dead time (except propagation delay).
MR
MR
MR
CP0
CP1
CP0
CP1
CP0
HEF4017B
HEF4017B
HEF4017B
CP1
Q1
- - - -
- - - -
- - - - - -
Q8 Q9
Q0 Q1
Q8 Q9
Q0 Q1
Q8 Q9
9 decoded
outputs
8 decoded
outputs
8 decoded
outputs
clock
first stage
intermediate stages
last stage
001aae577
Enabling the counter on CP1 when CP0 is HIGH, or on CP0 when CP1 is LOW, causes an extra count.
Fig 11. Counter expansion
HEF4017B_Q100
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© NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet
Rev. 1 — 4 June 2014
13 of 18
NXP [ NXP ]
