Philips Semiconductors
BUK9528-55A; BUK9628-55A
TrenchMOS™ logic level FET
5. Quick reference data
Table 2:
V
DS
I
D
P
tot
T
j
R
DSon
Quick reference data
Conditions
T
mb
= 25
°C;
V
GS
= 5 V
T
mb
= 25
°C
V
GS
= 5 V; I
D
= 15 A; T
j
= 25
°C
V
GS
= 4.5 V; I
D
= 15 A; T
j
= 25
°C
Typ
−
−
−
−
24
−
Max
55
42
99
175
28
30
Unit
V
A
W
°C
drain-source voltage (DC)
drain current (DC)
total power dissipation
junction temperature
drain-source on-state resistance
Symbol Parameter
m
Ω
m
Ω
6. Limiting values
Table 3: Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134).
Symbol Parameter
V
DS
V
DGR
V
GS
V
GSM
I
D
drain-source voltage (DC)
drain-gate voltage (DC)
gate-source voltage (DC)
non-repetitive gate-source voltage
drain current (DC)
t
p
≤
50
µs
T
mb
= 25
°C;
V
GS
= 5 V;
Figure 2
and
3
T
mb
= 100
°C;
V
GS
= 5 V;
I
DM
P
tot
T
stg
T
j
I
DR
I
DRM
W
DSS
peak drain current
total power dissipation
storage temperature
operating junction temperature
reverse drain current (DC)
pulsed reverse drain current
non-repetitive avalanche energy
T
mb
= 25
°C
T
mb
= 25
°C;
pulsed; t
p
≤
10
µs
unclamped inductive load; I
D
= 34 A;
V
DS
≤
55 V; V
GS
= 5 V; R
GS
= 50
Ω;
starting T
mb
= 25
°C
T
mb
= 25
°C;
pulsed; t
p
≤
10
µs;
Figure 3
T
mb
= 25
°C;
Figure 1
R
GS
= 20 kΩ
Conditions
Min
−
−
−
−
−
−
−
−
−55
−55
−
−
−
Max
55
55
±10
±15
42
30
168
99
+175
+175
42
168
57.8
Unit
V
V
V
V
A
A
A
W
°C
°C
A
A
mJ
Source-drain diode
Avalanche ruggedness
9397 750 07683
© Philips Electronics N.V. 2001. All rights reserved.
Product specification
Rev. 01 — 18 January 2001
2 of 15
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