Philips Semiconductors
Product specification
Silicon N-channel dual-gate MOS-FETs
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
V
DS
I
D
±I
G1
±I
G2
P
tot
P
tot
T
stg
T
j
Notes
1. Device mounted on a ceramic substrate, 8 mm
×
10 mm
×
0.7 mm.
2. Device mounted on a printed-circuit board.
PARAMETER
drain-source voltage
drain current
gate 1 current
gate 2 current
total power dissipation; BF998
up to T
amb
= 60
°C;
see Fig.3; note 1
up to T
amb
= 50
°C;
see Fig.3; note 2
total power dissipation; BF998R up to T
amb
= 50
°C;
see Fig.4; note 1
storage temperature
operating junction temperature
CONDITIONS
−
−
−
−
−
−
−
−65
−
BF998; BF998R
MIN.
MAX.
12
30
10
10
200
200
200
+150
150
V
UNIT
mA
mA
mA
mW
mW
mW
°C
°C
MLA198
MGA002
handbook, halfpage
handbook, halfpage
200
Ptot max
(mW)
(2)
(1)
200
Ptot max
(mW)
100
100
0
0
100
Tamb (
o
C)
200
0
0
100
Tamb (°C)
200
(1) Ceramic substrate.
(2) Printed-circuit board.
Fig.3 Power derating curves; BF998.
Fig.4 Power derating curve; BF998R.
1996 Aug 01
3
PHILIPS [ NXP SEMICONDUCTORS ]
