Philips Semiconductors
Product specification
2-input EXCLUSIVE-OR gate
74AHC1G86; 74AHCT1G86
Family 74AHCT1G
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
TEST CONDITIONS
OTHER VCC (V)
4.5 to 5.5 2.0
T
amb (°C)
SYMBOL
PARAMETER
25
−40 to +85 −40 to +125 UNIT
MIN. TYP. MAX. MIN. MAX. MIN. MAX.
VIH
VIL
HIGH-level input
voltage
−
−
2.0
−
2.0
−
V
LOW-level input
voltage
4.5 to 5.5
4.5
−
−
0.8
−
−
0.8
−
−
0.8
−
V
VOH
HIGH-leveloutput VI = VIH or VIL;
4.4
3.94
−
4.5
−
4.4
3.8
−
4.4
3.70
−
V
voltage
IO = −50 µA
VI = VIH or VIL;
IO = −8.0 mA
4.5
−
−
−
V
VOL
LOW-level output VI = VIH or VIL;
4.5
0
0.1
0.36
0.1
1.0
1.35
0.1
0.44
1.0
10
1.5
0.1
0.55
2.0
40
1.5
V
voltage
IO = 50 µA
VI = VIH or VIL;
IO = 8.0 mA
4.5
−
−
−
−
V
ILI
input leakage
current
VI = VIH or VIL
5.5
−
−
−
−
µA
µA
mA
ICC
∆ICC
quiescent supply VI = VCC or GND; 5.5
−
−
−
−
current
IO = 0
additional
VI = 3.4 V;
5.5
−
−
−
−
quiescent supply other inputs at
current per input VCC or GND;
pin
IO = 0
CI
input capacitance
−
1.5
10
−
10
−
10
pF
2002 Jun 06
6
NXP [ NXP ]
