Philips Semiconductors
Product specification
On/off logic IC
Power-on or system reset
The reset input (pin RES) is of the CMOS input levels type.
During a LOW level on pin RES the outputs are as shown
in Table 3 for RES = LOW.
Table 3
Logic levels for the reset input and oscillator failure
PIN
RP
ON/OFF
LED
SDA
CHI
Table 4
RES = LOW
HIGH
LOW
LOW
3-state
3-state
RES = HIGH
HIGH (voltage on V
DD
)
3-state [after a defined time (maximum reset time)]
HIGH
LOW
3-state (receiving mode if RP = LOW)
LOW (information for microcontroller)
SAA1305T
After the system reset (rising edge on pin RES) all internal
registers are in a defined condition (see Table 4) and the
outputs are as shown in Table 3 for RES = HIGH.
OSCILLATOR FAILURE
3-state
LOW
LOW
3-state
LOW
Defined condition after reset for the registers; RES = HIGH
CONTENTS
02 (HEX)
all input latches are enabled
same levels as corresponding inputs during falling edge on pin RES
03 (HEX)
04 (HEX)
FFFF (HEX); see Table 7
0000 (HEX)
REGISTER
Status register
New register
Old register
Control register
LED register
Alarm register
Watch register
Impedance register 03 (HEX)
2004 Jan 15
10
PANASONIC [ PANASONIC SEMICONDUCTOR ]
