Philips Semiconductors
Product specification
On/off logic IC
SAA1305T
handbook, full pagewidth
SAA1305T
OPERABLE
RES = HIGH
2
I C-bus error counter = 5
Watchdog timer error counter = 5
RUN
STANDBY
RESET
(3)
event ; CHI
(1)
(4)
(5)
entry
entry
(2)
control register bit 0
event
event
V
timer start
L
WAIT
V
timer end
L
(6)
(5)
entry
input D0 = logic 1
oscillator fault
event
RES = LOW
MGR202
(1) See Section “Run mode entries”.
(2) See Section “Run mode events”.
(3) Possible events are: alterations on any of the inputs D0 to D7, an impedance detection, an alarm timer event and an oscillator fault.
(4) See Section “Standby mode entries”.
(5) Not available.
(6) See Section “Wait mode entries”.
Fig.3 State diagram for IC modes.
RUN MODE ENTRIES
WAIT MODE ENTRIES
• Reset Watchdog timer error counter
• Enable Watchdog timer
• Disable Watchdog timer
• Reset I2C-bus error counter
• Reset Watchdog timer error counter
• Start VL timer
• Enable VL timer function
• Generate reset pulse
• Disable reset generation via inputs D0 to D7 changes
• Set pin CHI in 3-state
(inclusive impedance detection) and watch compare
• Reset I2C-bus interface
• Set pin ON/OFF to LOW (OFF is active).
STANDBY MODE ENTRIES
• Set pin CHI to LOW (LOW = active)
• Set pin ON/OFF to HIGH (ON is active).
• Disable Watchdog timer
• Reset Watchdog timer error counter
• Reset I2C-bus error counter
• Disable VL timer function
RUN MODE EVENTS
• I2C-bus read and write commands
• Watchdog timer reset
• Missed I2C-bus communication after a (CHI) change
• Enable reset generation via inputs D0 to D7 changes
(inclusive impedance detection) and watch compare
information signal
• Set pin ON/OFF to LOW (OFF is active)
• Set pin CHI in 3-state.
• Oscillator fault.
2004 Jan 15
6
PANASONIC [ PANASONIC ]
