PFS122
8bit MTP MCU with 12-bit R-Type ADC
6.26. Timer2 Control Register (tm2c), IO address = 0x30
Bit Reset
R/W
Description
Timer2 clock selection.
0000 : disable
0001 : CLK
0010 : IHRC or IHRC *2 (by code option TMx_source)
0011 : EOSC
0100 : ILRC
0101 : comparator output (ICE does NOT support.)
1000 : PA0 (rising edge)
7 - 4
0000
R/W
1001 : ~PA0 (falling edge)
1010 : PB0 (rising edge)
1011 : ~PB0 (falling edge)
1100 : PA4 (rising edge)
1101 : ~PA4 (falling edge)
Others: reserved
Notice: In ICE mode and IHRC is selected for Timer2 clock, the clock sent to Timer2 does
NOT be stopped, Timer2 will keep counting when ICE is in halt state.
Timer2 output selection.
00 : disable
01 : PB2
3 - 2
00
R/W
10 : PA3
11 : PB4
Timer2 mode selection.
0 / 1 : period mode / PWM mode
Enable to inverse the polarity of Timer2 output.
0 / 1: disable / enable
1
0
0
0
R/W
R/W
6.27. Timer2 Counter Register (tm2ct), IO address = 0x31
Bit
Reset
R/W
Description
7 - 0
0x00
R/W
Bit [7:0] of Timer2 counter register.
6.28. Timer2 Scalar Register (tm2s), IO address = 0x32
Bit
Reset
R/W
Description
PWM resolution selection.
0 : 8-bit
7
0
WO
1 : 6-bit or 7-bit (by code option TMx_bit)
Timer2 clock pre-scalar.
00 : ÷ 1
01 : ÷ 4
6 - 5
00
WO
WO
10 : ÷ 16
11 : ÷ 64
Timer2 clock scalar.
4 - 0 00000
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PDK-DS-PFS122-EN_V000-May 28, 2020
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