PFS122
8bit MTP MCU with 12-bit R-Type ADC
6.24. Comparator Control Register (gpcc), IO address = 0x2b
Bit
Reset
R/W
Description
Enable comparator. 0 / 1 : disable / enable
7
0
R/W When this bit is set to enable, please also set the corresponding analog input pins to be
digital disable to prevent IO leakage.
Comparator result of comparator.
6
5
4
-
RO
0: plus input < minus input
1: plus input > minus input
Select whether the comparator result output will be sampled by TM2_CLK?
0
0
R/W 0: result output NOT sampled by TM2_CLK
1: result output sampled by TM2_CLK
Inverse the polarity of result output of comparator.
R/W 0: polarity is NOT inversed.
1: polarity is inversed.
Selection the minus input (-) of comparator.
000 : PA3
001 : PA4
010 : Internal 1.20 volt bandgap reference voltage
3 - 1
000
R/W
011 : Vinternal R
100 : PB6 (not for ICE)
101 : PB7 (not for ICE)
11X: reserved
Selection the plus input (+) of comparator.
R/W 0 : Vinternal R
0
0
1 : PA4
6.25. Comparator Selection Register (gpcs), IO address = 0x2c
Bit
Reset
R/W
Description
Comparator output enable (to PA0).
0 / 1 : disable / enable
7
0
WO
Wakeup by comparator enable. (The comparator wakeup effectively when gpcc.6 electrical
level changed)Reserved.
0 / 1 : disable / enable
6
0
WO
5
4
0
0
WO Selection of high range of comparator.
WO Selection of low range of comparator.
Selection the voltage level of comparator.
3 - 0
0000
WO
0000 (lowest) ~ 1111 (highest)
©Copyright 2020, PADAUK Technology Co. Ltd
Page 68 of 93
PDK-DS-PFS122-EN_V000-May 28, 2020