OXCB950
OXFORD SEMICONDUCTOR LTD.
Register Address R/W
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
To access these registers LCR must be set to 0xBF
EFR
010
100
101
110
111
R/W
R/W
R/W
R/W
R/W
CTS
flow
RTS
Flow
Special
char
Enhance
mode
In-band flow control mode
control
control
detect
XON1
XON Character 1
9-bit mode
XON2
Special character 1
XON Character 2
Special Character 2
XOFF Character 1
Special character 3
XOFF Character 2
Special character 4
9-bit mode
XOFF1
9-bit mode
XOFF2
9-bit mode
Table 9: 650 Compatible Registers
Register Address R/W
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
1,6,7
7
ASR
001
R/W
Tx
FIFO
size
FIFO-
SEL
Special
Char
DTR
RTS
Remote
Tx
Tx
Idle
Disabled
Detect
Disabled
6
RFL
TFL
011
100
101
R
R
Number of characters in the receiver FIFO
Number of characters in the transmitter FIFO
3,6
3,8,9
ICR
R/W
Data read/written depends on the value written to the SPR prior to
the access of this register (see Table 11)
Table 10: 950 Specific Registers
Register access notes:
Note 1: Requires LCR[7] = 0
Note 2: Requires ACR[7] = 0
Note 3: Requires that last value written to LCR was not 0xBF
Note 4: To read this register ACR[7] must be = 0
Note 5: To read this register ACR[6] must be = 0
Note 6: Requires ACR[7] = 1
Note 7: Only bits 0 and 1 of this register can be written
Note 8: To read this register ACR[6] must be = 1
Note 9: This register acts as a window through which to read and write registers in the Indexed Control Register set
DS-0033 Sep 05
External-Free Release
Page 31
OXFORD [ OXFORD SEMICONDUCTOR ]
