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OXCB950-TQAG 参数 Datasheet PDF下载

OXCB950-TQAG图片预览
型号: OXCB950-TQAG
PDF下载: 下载PDF文件 查看货源
内容描述: 集成的高性能UART的Cardbus / 3.3V PCI接口 [Integrated High Performance UART Cardbus / 3.3v PCI interface]
分类和应用: PC
文件页数/大小: 67 页 / 598 K
品牌: OXFORD [ OXFORD SEMICONDUCTOR ]
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OXCB950  
OXFORD SEMICONDUCTOR LTD.  
Register name  
Reset value  
Program read/write  
Cardbus Mode  
PCI Mode  
EEPROM  
PCI  
R
1
Vendor ID  
Device ID  
Command  
Status  
0x1415  
W
1
0x950B  
W
R
0x0000  
0x0290  
-
R/W  
R/W  
R
W(bit 4)  
1
Revision ID  
Class code  
Header type  
BAR 0  
0x00  
-
W
-
1
0x070006  
R
0x00  
R
0x00000001  
0x00000000  
0x00000001  
0x00000000  
-
R/W  
R/W  
R/W  
R/W  
R/W  
R
BAR 1  
-
BAR 2  
-
BAR 3  
-
BAR 4  
0x00000000  
-
3
Cardbus CIS Pointer  
0x00000048 (relocate = 0)  
0x00000000  
(no CIS)  
W
or  
0x00000080 (relocate = 1)  
3
2
2
Subsystem VID  
Subsystem ID  
Cap ptr.  
0x1415  
W
W
-
R
R
0x0001  
0x40  
R
1
Interrupt line  
Interrupt pin  
Cap ID  
0x00  
-
R/W  
R
0x01  
0x01  
0x00  
W
-
R
Next ptr.  
-
R
PM capabilities  
PMC control/ status  
register  
0x6C01  
0x0000  
W
-
R
R/W  
Table 3: Cardbus/PCI configuration space default values  
1
For cardbus applications, the PC Card Standard 7.x defines these fields as “Allocated”. However, for cardbus support in  
Windows, these fields need to be defined to fully support the PCI configuration Space.  
2
For cardbus applications, the PC Card Standard 7.x defines these fields as “Reserved”. However, for cardbus support in  
Windows, these fields need to be defined to fully support the PCI configuration Space.  
3
Relocate is a bit in the local configuration registers that can locate the start of the cardbus information structure at DWORD18  
or DWORD 32 in the PCI configuration region. This bit is writable only via the optional EEPROM. The default state is 0, so the  
CIS is available at DWORD18 in the PCI configuration region.  
DS-0033 Sep 05  
External-Free Release  
Page 15  
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