FEDL7204-001DIGEST-01
OKI Semiconductor
ML7204-001
A0-A7
These are address input pins for accessing a frame/DMA/control register. Each address is as follows.
Transmit buffer (TX Buffer)
A7-A0 = 80h
Receive buffer (RX Buffer)
A7-A0 = 81h
Control register (CR)
See Tables 5 to 8 for the addresses.
D0-D15
These are data I/O pins for accessing a frame/DMA/control register. Since these pins are I/O pins, connect
pull-up resistors. When an 8-bit bus access is selected in the MCU interface data width selection register
(BW_SEL), pins D0-D7 are enabled. When using the pins with 8-bit bus access (BW_SEL = “1”), fix the input
of high-order D8-D15 to either “0” or “1” since they are constantly in an input state.
CSB
This is a chip select input pin for accessing a frame/control register.
RDB
This is a read enable input pin for accessing a frame/DMA/control register.
WRB
This is a write enable input pin for accessing a frame/DMA/control register.
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