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ML7204V-001TB 参数 Datasheet PDF下载

ML7204V-001TB图片预览
型号: ML7204V-001TB
PDF下载: 下载PDF文件 查看货源
内容描述: [暂无描述]
分类和应用: PC电信电信集成电路
文件页数/大小: 42 页 / 795 K
品牌: OKI [ OKI ELECTRONIC COMPONETS ]
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FEDL7204-001DIGEST-01  
OKI Semiconductor  
ML7204-001  
INTB/GPIOA[6]  
Primary function: INTB  
This in an interrupt request output pin.  
When the interrupt cause is changed, this pin outputs a “L” level for about 1.0 µs. When the interrupt factor is  
not changed, “H” is output. The interrupt factor can be checked by reading CR16-CR22. Table 1 lists the  
interrupt causes.  
The interrupt causes can be masked individually in the internal memory (interrupt cause mask control).  
Table 1 Interrupt Causes  
Rising  
edge  
Falling  
edge  
CR  
BIT  
B2  
B1  
B0  
B0  
Register name  
Remarks  
FSK receive overrun error notification register  
(FDET_OER)  
FSK receive framing error notification register  
(FDET_FER)  
FSK receive data read request notification register  
(FDET_RQ)  
FSK output data setting completion flag  
(FGEN_FLAG)  
Timer overflow display register (TMOVF)  
DSP status register (DSP_ERR)  
TONE1 detector detection status register  
(TONE1_DET)  
TONE0 detector detection status register  
(TONE0_DET)  
TGEN1 execution flag display register  
(TGEN1_EXFLAG)  
TGEN0 execution flag display register  
(TGEN0_EXFLAG)  
Dial pulse detector detection status register  
(DP_DET)  
DTMF detector detection status register  
(DTMF_DET)  
DTMF code display register (DTMF_CODE[3:0])  
CH2 transmit error status register (TXERR_CH2)  
CH1 transmit error status register (TXERR_CH1)  
CH2 transmit request notification register  
(FR0_CH2)  
CH1 transmit request notification register  
(FR0_CH1)  
{
{
{
×
×
CR16  
×
×
CR17  
CR18  
{
B0  
B7  
{
{
×
×
B4  
B3  
B2  
B1  
B6  
B4  
{
{
{
{
{
{
{
{
{
{
{
{
CR19  
CR20  
CR21  
CR22  
B3-B0  
B3  
B2  
{
{
{
{
{
{
B1  
{
{
×
×
B0  
B3  
B2  
CH2 receive error status register (RXERR_CH2)  
CH1 receive error status register (RXERR_CH1)  
Receive invalid write error notification register  
(RXBW_ERR)  
{
{
{
{
B1  
{
{
B0  
Receive request notification register (FR1)  
{
×
{: With INTB interrupt generation function  
×: Without INTB interrupt generation function  
Secondary function: GPIOA[6]  
When the primary function/secondary function selection register (GPFA[6]) of GPIOA[6] is set to “1”, this pin  
functions as a general-purpose I/O port GPIOA[6].  
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