FEDL7204-001DIGEST-01
OKI Semiconductor
ML7204-001
Configuration Example 2 (Basic Call, CODEC_B)
GSX1
TXGAIN PCM1 PCM_TXEN1
RX_SIG
TXDETB
PCM I/F
10kΩ
Encoder
G.711
AIN1N
A/D1
BPF
LPEN0
TXGAINB
STGAINB
CODECB_TXEN
AMP1
TXGAIN_PCM0
P/S
PCMO
PCM_TXEN0
SYNC
BCLK
Linear PCM
(CODEC_B)
TS
CONT
PCM Codec
CLKSEL
RXGAIN_ITS1
Decoder
G.711
10kΩ
RXGAINB
PCMI
S/P
CODECB_RXEN
LPEN1
D/A1
LPF
VFRO1
AMP3
RXGENB
RXGAIN_ITS2
RXGAIN_PCM0
RXGAIN_PCM1
PCM_RXEN1
PCM_RXEN0
TXGEN
GSX0
AIN0N
AIN0P
ACK1B/
GPIOA[5]
ACK0B/
GPIOA[4]
TXDETA
10kΩ
G.729.A
TXGAIN
TX
Buffer0
TXGAIN_SC
SC_TXEN
CH1
A/D0
BPF
T
S
W
TXGAINA CODECA_TXEN
Sin
Encoder
G.711
AMP0
Sout
GPAD
LPAD
+
Center
TX
Buffer1
FR1B
FR0B
WRB
RDB
Clip
-
ATTs
CH2
DC_EN
TXGAIN
RX2TX1
_GAIN
Speech Codec
_CH2
Linear PCM
(CODEC_A)
Echo Canceller
Bus Control
Unit
AFF
RX1TX2
_GAIN
STGAINA
RXGAINA
CSB
D0-D15
A0-A7
10kΩ
16b
8b
RXGAIN
G.729.A
Decoder
RX
Buffer0
RXGAIN_S
SC_RXEN
Rout
ATTr
Rin
_CH1
T
S
W
D/A0
LPF
VFRO0
AVREF
CH1
CODECA
RXGEN
RX
Buffer1
AMP2
RXGAIN
_CH2
RXGEN
RXDET
RX_SIG
G.711
CH2
DC_EN
VREF
Frame/DMA
Controller
TIMER
TIMOVF
Generator path
TGEN1_EXFL
Detector path setting
GPIO2
TXDETA
TXDETB
FDET
DVDD2
DVDD1
DVDD0
DGND2
DGND1
DGND0
DPGEN
DPDET
FSK_DET
FDET_FER/FDET_OER
TXGEN
TONE_GEN1
(TONE)
Control
Register
FDET_D[7:0]
GPIO0
DTMF_DET
RXGENA_EN
RXGENB_EN
DTMF_REC
TGEN0_EXFLAG
TONE_GEN0
(TONE)
FGEN_FLAG
RXGENA
RXGENB
DP_DET
DTMF_CODE[3:0]
DTMF_DET
DTMF_CODE[3:0]
TONE0_DET
TONE1_DET
DP_DET
TONE_DET0
TONE0_DET
TONE1_DET
POWER
MCK
RXGEN
PLL
CKGN
SYNC (8 kHz)
INT
TONE_DET1
FSK_GEN
INTB/
GPIOA[6]
AGND
AVDD
RXDET
FDET_RQ
FDET_FER/FDET_OER
OSC
FGEN_FLAG
TIMOVF
VREGOUT
VGB
12.288 MHz
Unused
8
6
4
This example shows the configuration for making calls with an analog telephone set (A-TEL) on the NW side by
connecting the analog telephone interface on the Linear PCM CODEC_B side.
RX_SIG
Linear
PCM
PCM
I/F
A-TEL
PCM
Codec
Codec
(CODEC_B)
Linear
PCM
MCU
I/F
Speech
Codec
EC
VoIP-NW
Codec
(CODEC_A)
RX_SIG
ML7204 (Configuration example 2)
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