FEDL7204-001DIGEST-01
OKI Semiconductor
ML7204-001
Transmit/Receive Buffer Interface (Frame Mode)
(AVDD = 3.0 to 3.6 V, DVDD0, 1, 2 = 3.0 to 3.6 V, AGND = DGND0, 1, 2
= 0.0 V, Ta = –20 to 60°C unless otherwise specified)
Parameter
FR1B setup time
Symbol
tF1S
tF1D
Condition
Min.
3
Typ.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max.
—
20
—
—
—
—
—
—
—
—
—
—
—
—
20
30
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
FR1B output delay time
Address setup time (at Read)
Address hold time (at Read))
Address setup time (at Write)
Address hold time (at Write)
Write data setup time
—
10
0
tRAS
tRAH
tWAS
tWAH
tWDS
tWDH
tRCS
tRCH
tWCS
tWCH
tWW
tF0S
tF0D
tRDD
tRDH
tRW
10
10
20
10
10
0
Write data hold time
CSB setup time (at Read)
CSB hold time (at Read)
CSB setup time (at Write)
CSB hold time (at Write)
WRB pulse width
CL = 50 pF
10
10
10
3
—
—
3
FR0B setup time
FR0B output delay time
Read data output delay time
Read data output hold time
RDB pulse width
35
10
CSB disable time
tCD
FR0B
Output
tF0S
tF0D
FR1B
Output
tF1S
tF1D
A7-A0
Input
A2
A1
tWAS
tWCS
tWAH
tRAS
tRCS
tRAH
D15-D0
Input-
D1
D2
Input
Output
output
tWDS tWDH
tRDD
tRDH
CSB
Input
tWCH
tCD
tRCH
WRB
Input
tRW
tWW
RDB
Input
Write timing
Read timing
Figure 7 Transmit/Receive Buffer Interface (Frame Mode)
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