FEDL7204-001DIGEST-01
OKI Semiconductor
ML7204-001
Timings of PDNB, XO, and AVREF
(AVDD = 3.0 to 3.6 V, DVDD0, 1, 2 = 3.0 to 3.6 V, AGND = DGND0, 1, 2
= 0.0 V, Ta = –20 to 60°C unless otherwise specified)
Parameter
Power-down signal pulse
width
Symbol
tPDNB
Condition
Min.
Typ.
Max.
Unit
PDNB pin
250
—
—
µs
AVDD supply delay time
Oscillation activation time
tAVDDON
txtal
—
—
0
—
—
—
—
20
ns
ms
AVREF = 1.4 (90%)
C5 = 4.7 µF, C6 = 0.1 µF
(See Figure 9)
AVREF = 1.4 (90%)
C5 = 2.2 µF, C6 = 0.1 µF
(See Figure 9)
—
—
600
ms
AVREF rise time
tAVREF
—
—
300
ms
DVDD
AVDD
0 V
DVDDAVDD
90%
DVDD
AVDD
tAVDDON
Approx.
90%
2.5V
VREGOUT
PDNB
0 V
DVDD
0 V
tPDNB
AVDD
0 V
XO
txtal
Approx.
1.4 V
0 V
AVREF
tAVREF
Figure 1 Timings of PDNB, XO, and AVREF
(Note)
The capacitance of the AVREF capacitor (C5) affects the AVREF rise time and analog characteristics. If
weight is given to the analog characteristics, specify 4.7 µF, and if it is given to the AVREF rise time, specify
2.2 µF. The electrical characteristics for the analog characteristics that are described above are guaranteed in
both capacitances.
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