FEDL7204-001DIGEST-01
OKI Semiconductor
ML7204-001
Control Register Interface
(AVDD = 3.0 to 3.6 V, DVDD0, 1, 2 = 3.0 to 3.6 V, AGND = DGND0, 1, 2
= 0.0 V, Ta= –20 to 60°C unless otherwise specified)
Parameter
Symbol
tRAS
tRAH
tWAS
tWAH
tWDS
tWDH
tRCS
tRCH
tWCS
tWCH
tWW
Condition
Min.
10
0
Typ.
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
Max.
—
—
—
—
—
—
—
—
—
—
—
20
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address setup time (at Read)
Address hold time (at Read))
Address setup time (at Write)
Address hold time (at Write)
Write data setup time
10
10
20
10
10
0
Write data hold time
CSB setup time (at Read)
CSB hold time (at Read)
CSB setup time (at Write)
CSB hold time (at Write)
WRB pulse width
Read data output delay time
Read data output hold time
RDB pulse width
CL = 50 pF
10
10
10
—
3
25
10
tRDD
tRDH
tRW
CSB disable time
tCD
A7-A0
Input
A2
A1
tWAS
tWAH
tRAS
tRCS
tRAH
D7-D0
Input-
output
D2
D1
Output
Input
tWDStWDH
tRDD
tRDH
CSB
Input
tWCS
tWCH
tCD
tRCH
WRB
Input
tRW
tWW
RDB
Input
Write timing
Read timing
Figure 6 Control Register Interface
18/42