■ ML53612 ■ ––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
Configuration Register Byte 17, AR = 0011h
DR_0
C
Definition
0
1
2
3
4
5
6
7
136
137
138
139
140
141
142
143
GPIO_0 Input
GPIO_0 Output
GPIO_0 Output Enable
GPIO_0 Output Driver Configuration
GPIO _0 Latch Polarity
GPIO _0 Interrupt Mask
GPIO _0 Latch Clear
GPIO _0 Latch
GPIO_0 Input (C_ [136]) (Read Only)
0
1
→
→
GPIO_0 Input = 0
GPIO_0 Input = 1
GPIO_0 Output (C_ [137]) (Read/Write)
0
1
→
→
GPIO_0 Output = 0 (Default)
GPIO_0 Output = 1
GPIO_0 Output Enable (C_ [138]) (Read/Write)
0
1
→
→
GPIO_0 Output Tri-stated (Default)
GPIO_0 Output Enabled
GPIO_0 Output Driver Configuration (C_ [139]) (Read/Write)
0
1
→
→
Open Drain (Default)
Push-Pull
GPIO _0 Latch Polarity (C_ [140]) (Read/Write)
0
1
→
→
GPIO _0 Latch set when GPIO_0 input = 0 (Default)
GPIO _0 Latch set when GPIO_0 input = 1
GPIO _0 Interrupt Mask (C_ [141]) (Read/Write)
0
1
→
→
GPIO _0 Interrupt Unmasked
GPIO _0 Interrupt Masked (Default)
GPIO _0 Latch Clear (C_ [142]) (Read/Write)
0
1
→
→
GPIO _0 Latch Enabled
GPIO _0 Latch held clear (Default)
GPIO _0 Latch (C_ [143]) (Read Only)
0
1
→
→
GPIO _0 Latch False
GPIO _0 Latch True
34
Oki Semiconductor