■ ML53612 ■ ––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––
Configuration Register Byte 19, AR = 0013h
DR_0
C
Definition
0
1
2
3
4
5
6
7
152
153
154
155
156
157
158
159
GPIO_2 Input
GPIO_2 Output
GPIO_2 Output Enable
GPIO_2 Output Driver Configuration
GPIO _2 Latch Polarity
GPIO _2 Interrupt Mask
GPIO _2 Latch Clear
GPIO _2 Latch
GPIO_2 Input (C_ [152]) (Read Only)
0
1
→
→
GPIO_2 Input = 0
GPIO_2 Input = 1
GPIO_2 Output (C_ [153]) (Read/Write)
0
1
→
→
GPIO_2 Output = 0 (Default)
GPIO_2 Output = 1
GPIO_2 Output Enable (C_ [154]) (Read/Write)
0
1
→
→
GPIO_2 Output Tri-stated (Default)
GPIO_2 Output Enabled
GPIO_2 Output Driver Configuration (C_ [155]) (Read/Write)
0
1
→
→
Open Drain (Default)
Push-Pull
GPIO _2 Latch Polarity (C_ [156]) (Read/Write)
0
1
→
→
GPIO _2 Latch set when GPIO_2 input = 0 (Default)
GPIO _2 Latch set when GPIO_2 input = 1
GPIO _2 Interrupt Mask (C_ [157]) (Read/Write)
0
1
→
→
GPIO _2 Interrupt Unmasked
GPIO _2 Interrupt Masked (Default)
GPIO _2 Latch Clear (C_ [158]) (Read/Write)
0
1
→
→
GPIO _2 Latch Enabled
GPIO _2 Latch held clear (Default)
GPIO _2 Latch (C_ [159]) (Read Only)
0
1
→
→
GPIO _2 Latch False
GPIO _2 Latch True
36
Oki Semiconductor