––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––––– ■ ML53612 ■
Configuration Register Byte 8, AR = 0008h
DR_0
C
Definition
0
1
2
3
4
5
6
7
64
65
66
67
68
69
70
71
L_CLK_0, L_FS_0 Output Enable
L_CLK_1, L_FS_1 Output Enable
CT_D_ Output Enable Mode
CT_D_DISABLE Output Enable
CT_D_DISABLE
CT_D_DISABLE On Input
CT_D_DISABLE On Error
CT_D_DISABLE Read-back
L_CLK_0, L_FS_0 Output Enable (C_ [64]) (Read/Write)
0
1
→
→
L_CLK_0, L_FS_0 Output Tri-stated (Default)
L_CLK_0, L_FS_0 Output Enabled
L_CLK_1, L_FS_1 Output Enable (C_ [65]) (Read/Write)
0
1
→
→
L_CLK_1, L_FS_1 Output Tri-stated (Default)
L_CLK_1, L_FS_1 Output Enabled
CT_D_ Output Enable Mode (C_ [66]) (Read/Write)
0
1
→
→
CT_D_[31:0] Output Tri-stated before bit cell boundary - Based on H.100/H.110 (Default)
CT_D_[31:0] Output Tri-stated at bit cell boundary
CT_D_DISABLE Output Enable (C_ [67]) (Read/Write)
0
1
→
→
CT_D_DISABLE pin Output Tri-stated (Default)
CT_D_DISABLE pin Output Enabled
CT_D_DISABLE (C_ [68]) (Read/Write)
0
1
→
→
CT_D_ Outputs Enabled (Default)
CT_D_ Outputs Disabled
CT_D_DISABLE On Input (C_ [69]) (Read/Write)
0
1
→
→
CT_D_DISABLE On Input Disabled (Default)
CT_D_DISABLE On Input Enabled
CT_D_DISABLE On Error (C_ [70]) (Read/Write)
0
1
→
→
CT_D_DISABLE On Error Disabled (Default)
CT_D_DISABLE On Error Enabled
CT_D_DISABLE Read-back (C_ [71]) (Read Only)
0
1
→
→
CT_D_ Outputs Enabled
CT_D_ Outputs Disabled
Oki Semiconductor
25
OKI [ OKI ELECTRONIC COMPONETS ]
