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TDA8950 参数 Datasheet PDF下载

TDA8950图片预览
型号: TDA8950
PDF下载: 下载PDF文件 查看货源
内容描述: 2× 150W的D类功率放大器 [2 X 150 W class-D power amplifier]
分类和应用: 放大器功率放大器
文件页数/大小: 39 页 / 272 K
品牌: NXP [ NXP ]
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TDA8950  
NXP Semiconductors  
2 × 150 W class-D power amplifier  
12.2 Stereo and dual SE application characteristics  
Table 9.  
Dynamic characteristics  
VP = ±35 V; RL = 4 ; fi = 1 kHz; fosc = 345 kHz; RsL < 0.1 [1]; Tamb = 25 °C; unless otherwise specified.  
Symbol Parameter  
Conditions  
Min Typ Max Unit  
[2]  
Po  
output power  
L = 22 µH; C = 680 nF; Tj = 85 °C  
RL = 4 ; THD = 0.5 %; VP = ±37 V  
RL = 4 ; THD = 10 %; VP = ±37 V  
RL = 6 ; THD = 10 %; VP = ±37 V  
RL = 4 ; THD = 10 %; VP = ±39 V  
Po = 1 W; fi = 1 kHz  
-
100  
150  
100  
170  
-
-
-
-
W
W
W
W
%
%
dB  
-
-
-
[3]  
[3]  
THD  
total harmonic distortion  
-
0.05 -  
0.05 -  
Po = 1 W; fi = 6 kHz  
-
Gv(cl)  
closed-loop voltage gain  
29  
30  
31  
SVRR  
supply voltage ripple rejection  
between pin VDDPn and SGND  
operating; fi = 100 Hz  
operating; fi = 1 kHz  
mute; fi = 100 Hz  
[4]  
[4]  
[4]  
[4]  
-
-
-
-
90  
-
-
-
-
dB  
dB  
dB  
dB  
70  
75  
standby; fi = 100 Hz  
between pin VSSPn and SGND  
operating; fi = 100 Hz  
operating; fi = 1 kHz  
mute; fi = 100 Hz  
120  
[4]  
[4]  
[4]  
[4]  
-
80  
60  
80  
115  
63  
160  
85  
70  
-
-
-
-
-
-
-
-
-
1
-
-
-
-
-
-
-
dB  
dB  
dB  
dB  
kΩ  
µV  
µV  
dB  
dB  
dB  
dB  
%
-
-
standby; fi = 100 Hz  
between the input pins and SGND  
operating; Rs = 0 Ω  
-
Zi  
input impedance  
45  
-
[5]  
[6]  
[7]  
Vn(o)  
output noise voltage  
mute  
-
αcs  
channel separation  
-
|∆Gv|  
αmute  
CMRR  
ηpo  
voltage gain difference  
mute attenuation  
-
[8]  
fi = 1 kHz; Vi = 2 V (RMS)  
Vi(CM) = 1 V (RMS)  
SE, RL = 4 Ω  
-
75  
75  
88  
90  
88  
200  
190  
common mode rejection ratio  
output power efficiency  
-
-
SE, RL = 6 Ω  
-
BTL, RL = 8 Ω  
-
%
[9]  
[9]  
RDSon(hs) high-side drain-source on-state resistance  
RDSon(ls) low-side drain-source on-state resistance  
-
mΩ  
mΩ  
-
[1] RsL is the series resistance of inductor of low-pass LC filter in the application.  
[2] Output power is measured indirectly; based on RDSon measurement. See also Section 13.3.  
[3] THD is measured in a bandwidth of 22 Hz to 20 kHz, using AES17 20 kHz brickwall filter. Maximum limit is not guaranteed100 % tested.  
[4] Vripple = Vripple(max) = 2 V (p-p); Rs = 0 . Measured independently between VDDPn and SGND and between VSSPn and SGND.  
[5] B = 22 Hz to 20 kHz, using AES17 20 kHz brickwall filter.  
[6] B = 22 Hz to 22 kHz, using AES17 20 kHz brickwall filter; independent of Rs.  
[7] Po = 1 W; Rs = 0 ; fi = 1 kHz.  
[8] Vi = Vi(max) = 1 V (RMS); fi = 1 kHz.  
[9] Leads and bond wires included.  
TDA8950_1  
© NXP B.V. 2008. All rights reserved.  
Preliminary data sheet  
Rev. 01 — 9 September 2008  
15 of 39  
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