NXP Semiconductors
PF4210
14-channel power management integrated circuit (PMIC) for audio/video applications
Symbol
Description (rating)
Min
Max
Unit
[4] [5] [6]
RΘJA
Junction to ambient
Natural convection
°C/W
Four layer board (2s2p)
Eight layer board (2s6p)
—
—
28
15
[4] [6]
RΘJMA
Junction to ambient (@200 ft/min)
Four layer board (2s2p)
°C/W
—
—
—
22
10
[7]
[8]
[9]
RΘJB
Junction to board
°C/W
°C/W
°C/W
RΘJCBOTTOM
ΨJT
Junction to case bottom
1.2
Junction to package top
Natural convection
—
2.0
[1] Do not operate beyond 125 °C for extended period of time. Operation above 150 °C may cause permanent damage to the IC. See Table 5 for thermal
protection features.
[2] Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause a
malfunction or permanent damage to the device.
[3] NXP’s Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture
Sensitivity Levels (MSL), go to www.nxp.com, search by part number (remove prefixes/suffixes) and enter the core ID to view all orderable parts
(MC33xxxD enter 33xxx), and review parametrics.
[4] Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board) temperature, ambient
temperature, air flow, power dissipation of other components on the board, and board thermal resistance.
[5] The board uses the JEDEC specifications for thermal testing (and simulation) JESD51-7 and JESD51-5.
[6] Per JEDEC JESD51-6 with the board horizontal
[7] Thermal resistance between the die and the printed-circuit board per JEDEC JESD51-8. Board temperature is measured on the top surface of the board
near the package.
[8] Thermal resistance between the die and the case top surface as measured by the cold plate method (MIL SPEC-883 Method 1012.1).
[9] Thermal characterization parameter indicating the temperature difference between the package top and the junction temperature per JEDEC JESD51-2.
When Greek letter (Ψ) is not available, the thermal characterization parameter is written as Psi-JT.
8.3 Power dissipation
During operation, the temperature of the die should not exceed the operating junction
temperature noted in Table 4. To optimize the thermal management and to avoid
overheating, the PF4210 provides thermal protection.
An internal comparator monitors the die temperature. Interrupts THERM110I,
THERM120I, THERM125I, and THERM130I are generated when the respective
thresholds specified in Table 5 are crossed in either direction. The temperature range
can be determined by reading the THERMxxxS bits in register INTSENSE0.
In the event of excessive power dissipation, thermal protection circuitry shuts down the
PF4210. This thermal protection acts above the thermal protection threshold listed in
Table 5. To avoid any unwanted power-down resulting from internal noise, the protection
is debounced for 8.0 ms. This protection should be considered as a fail-safe mechanism
and therefore the system should be configured so protection is not tripped under normal
conditions.
Table 5.ꢀThermal protection thresholds
Parameter
Min
Typ
Max
Units
Thermal 110 °C threshold
(THERM110)
100
110
120
°C
Thermal 120 °C threshold
(THERM120)
110
115
120
125
130
135
°C
°C
Thermal 125 °C threshold
(THERM125)
PF4210
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2018. All rights reserved.
Data sheet: technical data
Rev. 2.0 — 14 November 2018
9 / 137
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