NXP Semiconductors
PF4210
14-channel power management integrated circuit (PMIC) for audio/video applications
Number Name
Function Max rating
Type
Definition
54
55
56
—
SCL
Input
Input
Input
GND
3.6 V
3.6 V
3.6 V
—
Digital
Analog
Digital
GND
I2C clock
VDDIO
PWRON
EP
Supply for I2C bus. Bypass with 0.1 µF ceramic capacitor
Power on/off from processor
Expose pad. Functions as ground return for buck
regulators. Tie this pad to the inner and external ground
planes through vias to allow effective thermal dissipation.
[1] Unused switching regulators should be connected as follow: Pins SWxLX and SWxFB should be unconnected and pin SWxIN should be connected to VIN
with a 0.1 µF bypass capacitor.
[2] 10 V maximum voltage rating during OTP fuse programming. 7.5 V maximum DC voltage rated otherwise.
8 General product characteristics
8.1 Absolute maximum ratings
Table 3.ꢀAbsolute maximum ratings
All voltages are with respect to ground, unless otherwise noted. Exceeding these ratings may cause malfunction or
permanent damage to the device. For maximum voltage rating for each pin see Section 7.2 "Pin definitions".
Symbol
Electrical ratings
VIN
Description
Value
Unit
Main input supply voltage
OTP programming input supply voltage
Coin cell voltage
−0.3 to 4.8
−0.3 to 10
−0.3 to 3.6
V
V
V
VDDOTP
VLICELL
[1]
VESD
ESD ratings
Human body model
Charge device model
±2000
±500
V
[1] ESD testing is performed in accordance with the human body model (HBM) (CZAP = 100 pF, RZAP = 1500 Ω), and the charge device model (CDM), robotic
(CZAP = 4.0 pF).
8.2 Thermal characteristics
Table 4.ꢀThermal ratings
Symbol
Description (rating)
Min
Max
Unit
Thermal ratings
TA
Ambient operating temperature range
MC32PF4210
°C
0
85
MC34PF4210
−40
105
[1]
[2]
TJ
Operating junction temperature range
Storage temperature range
−40
−65
—
125
°C
°C
°C
TST
TPPRT
150
[3]
Peak package reflow temperature
QFN56 thermal resistance and package dissipation ratings
PF4210
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© NXP B.V. 2018. All rights reserved.
Data sheet: technical data
Rev. 2.0 — 14 November 2018
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