NXP Semiconductors
PF4210
14-channel power management integrated circuit (PMIC) for audio/video applications
6 Internal block diagram
PF4210
VIN1
SW1FB
SW1AIN
SW1ALX
VGEN1
100 mA
VGEN1
SW1A/B
SINGLE/DUAL
2500 mA
O/P
DRIVE
VGEN2
250 mA
VGEN2
SW1BLX
SW1BIN
BUCK
O/P
DRIVE
VIN2
VGEN3
100 mA
VGEN3
SW1CLX
O/P
SW1C
2000 mA
BUCK
DRIVE
SW1CIN
VGEN4
350 mA
SW1CFB
VGEN4
SW1VSSSNS
CORE CONTROL LOGIC
VIN3
VGEN5
100 mA
SW2LX
SW2IN
SW2IN
O/P
INITIALIZATION STATE
MACHINE
SW2
2500 mA
BUCK
VGEN5
DRIVE
VGEN6
200 mA
SW2FB
VGEN6
SW3AFB
SW3AIN
SW3ALX
CONTROL
OTP
SUPPLIES
CONTROL
O/P
SW3A/B
SINGLE/DUAL
DDR
DRIVE
VDDOTP
SW3BLX
O/P
3000 mA
BUCK
DRIVE
SW3BIN
VDDIO
SCL
2
I C
SW3BFB
INTERFACE
SDA
SW3VSSSNS
DVS
CONTROL
SW4FB
SW4IN
DVS CONTROL
SW4
1000 mA
BUCK
O/P
DRIVE
SW4LX
GNDREF1
TRIM-IN-PACKAGE
VCOREDIG
VCOREREF
VCORE
2
I C REGISTER
MAP
CLOCKS
AND RESETS
REFERENCE
GENERATION
SWBST
600 mA
BOOST
SWBSTLX
SWBSTIN
SWBSTFB
O/P
DRIVE
GNDREF
CLOCKS
32 kHz and 16 MHz
VREFDDR
VINREFDDR
VHALF
VIN
BEST
OF
SUPPLY
LI-CELL
CHARGER
LICELL
VSNVS
aaa-026471
Figure 2.ꢀSimplified internal block diagram
PF4210
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© NXP B.V. 2018. All rights reserved.
Data sheet: technical data
Rev. 2.0 — 14 November 2018
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