欢迎访问ic37.com |
会员登录 免费注册
发布采购

MC34PF4210A0ES 参数 Datasheet PDF下载

MC34PF4210A0ES图片预览
型号: MC34PF4210A0ES
PDF下载: 下载PDF文件 查看货源
内容描述: [14-channel power management integrated circuit (PMIC) for audio/video applications]
分类和应用: 集成电源管理电路
文件页数/大小: 137 页 / 1328 K
品牌: NXP [ NXP ]
 浏览型号MC34PF4210A0ES的Datasheet PDF文件第16页浏览型号MC34PF4210A0ES的Datasheet PDF文件第17页浏览型号MC34PF4210A0ES的Datasheet PDF文件第18页浏览型号MC34PF4210A0ES的Datasheet PDF文件第19页浏览型号MC34PF4210A0ES的Datasheet PDF文件第21页浏览型号MC34PF4210A0ES的Datasheet PDF文件第22页浏览型号MC34PF4210A0ES的Datasheet PDF文件第23页浏览型号MC34PF4210A0ES的Datasheet PDF文件第24页  
NXP Semiconductors  
PF4210  
14-channel power management integrated circuit (PMIC) for audio/video applications  
I2C_SLV_ADDR[3] hard  
coded  
I2C_SLV_ADDR[2:0]  
I2C device address (Hex)  
1
1
1
1
1
011  
100  
101  
110  
111  
0x0B  
0x0C  
0x0D  
0x0E  
0x0F  
10.1.2.4 Soft start ramp rate  
The startup ramp rate or soft start ramp rate can be selected from the options shown in  
Section 10.4.4.2.1 "Dynamic voltage scaling".  
10.1.3 OTP prototyping  
Before permanently programming fuses, it is possible to test the desired configuration  
by using the Try Before Buy feature. With this feature, the configuration is loaded from  
the OTP registers. These registers serve as temporary storage for the values to be  
written to the fuses, for the values read from the fuses, or for the values read from the  
default configuration. To avoid confusion, these registers are referred to as the TBBOTP  
registers. The portion of the register map concerned with OTP is shown in Table 135 and  
Table 136.  
The contents of the TBBOTP registers are initialized to zero when a valid VIN is first  
applied. The values loaded into the TBBOTP registers depend on the setting of the  
VDDOTP pin and on the value of the TBB_POR and FUSE_POR_XOR bits (see  
Table 14).  
If VDDOTP = VCOREDIG (1.5 V), the values are loaded from the default configuration.  
If VDDOTP = 0.0 V, TBB_POR = 0 and FUSE_POR_XOR = 1, the values are loaded  
from the fuses. In the PF4210, FUSE_POR1, FUSE_POR2, and FUSE_POR3 are  
XOR'ed into the FUSE_POR_XOR bit. The FUSE_POR_XOR has to be 1 for fuses to  
be loaded. This can be achieved by setting any one or all of the FUSE_PORx bits. It is  
required to set all of the FUSE_PORx bits to be able to load the fuses.  
If VDDOTP = 0.0 V, TBB_POR = 0 and FUSE_POR_XOR = 0, the TBBOTP registers  
remain initialized at zero.  
The initial value of TBB_POR is always 0; only when VDDOTP = 0.0 V and TBB_POR  
is set to 1 and the values from the TBBOTP registers maintained and not loaded from a  
different source.  
The contents of the TBBOTP registers are modified by I2C. To communicate with I2C,  
VIN must be valid and VDDIO to which SDA and SCL are pulled up, must be powered  
by a 1.7 V to 3.6 V supply. VIN or the coin cell voltage must be valid to maintain the  
contents of the registers. To power on with the contents of the TBBOTP registers, the  
following conditions must exist:  
VIN is valid  
VDDOTP = 0.0 V  
TBB_POR = 1  
Valid turn on event  
PF4210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2018. All rights reserved.  
Data sheet: technical data  
Rev. 2.0 — 14 November 2018  
20 / 137  
 
 
 复制成功!