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MC34PF4210A0ES 参数 Datasheet PDF下载

MC34PF4210A0ES图片预览
型号: MC34PF4210A0ES
PDF下载: 下载PDF文件 查看货源
内容描述: [14-channel power management integrated circuit (PMIC) for audio/video applications]
分类和应用: 集成电源管理电路
文件页数/大小: 137 页 / 1328 K
品牌: NXP [ NXP ]
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NXP Semiconductors  
PF4210  
14-channel power management integrated circuit (PMIC) for audio/video applications  
Table 15.ꢀ16 MHz clock specifications  
TMIN to TMAX (see Table 4), VIN = 2.8 V to 4.5 V, LICELL = 1.8 V to 3.3 V and typical external  
component values. Typical values are characterized at VIN = 3.6 V, LICELL = 3.0 V, and 25 °C,  
unless otherwise noted.  
Symbol  
VIN16MHz  
f16MHZ  
Parameters  
Min  
2.8  
Typ  
Max  
4.5  
Units  
V
Operating voltage from VIN  
16 MHz clock frequency  
2.0 MHz clock frequency  
14.7  
1.84  
16  
17.2  
2.15  
MHz  
MHz  
[1]  
f2MHZ  
[1] 2.0 MHz clock is derived from the 16 MHz clock.  
10.2.1 Clock adjustment  
The 16 MHz clock and hence the switching frequency of the regulators, can be adjusted  
to improve the noise integrity of the system. By changing the factory trim values of the  
16 MHz clock, the user may add an offset as small as ±3.0 % of the nominal frequency.  
Contact your NXP representative for detailed information on this feature.  
10.3 Bias and references block description  
10.3.1 Internal core voltage references  
All regulators use the main band gap as the reference. The main band gap is bypassed  
with a capacitor at VCOREREF. The band gap and the rest of the core circuitry are  
supplied from VCORE.  
The performance of the regulator is directly dependent on the performance of the band  
gap. No external DC loading is allowed on VCORE, VCOREDIG, or VCOREREF.  
VCOREDIG is powered as long as there is a valid supply and/or valid coin cell. Table 16  
shows the main characteristics of the core circuitry.  
Table 16.ꢀCore voltages electrical specifications  
TMIN to TMAX (see Table 4),VIN = 2.8 V to 4.5 V, LICELL = 1.8 V to 3.3 V, and typical external component values. Typical  
values are characterized at VIN = 3.6 V, LICELL = 3.0 V, and 25 °C, unless otherwise noted.[1]  
Symbol  
VCOREDIG (digital core supply)  
VCOREDIG Output voltage  
Parameters  
Min  
Typ  
Max  
Units  
[2]  
V
ON mode  
Coin cell mode and OFF  
1.5  
1.3  
VCORE (analog core supply)  
VCORE Output voltage  
V
ON mode and charging  
OFF and coin cell mode  
2.775  
0.0  
VCOREREF (band gap / regulator reference)  
VCOREREF  
Output voltage  
1.2  
0.5  
V
%
%
VCOREREFACC  
VCOREREFTACC  
Absolute accuracy  
Temperature drift  
0.25  
[1] For information only  
PF4210  
All information provided in this document is subject to legal disclaimers.  
© NXP B.V. 2018. All rights reserved.  
Data sheet: technical data  
Rev. 2.0 — 14 November 2018  
22 / 137  
 
 
 
 
 
 
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