NXP Semiconductors
FXPS7115D4
Digital absolute pressure sensor, 40 kPa to 115 kPa
Table 47.ꢀUF_REGION_R - UF region selection register (address 15h) bit allocation
Bit
7
6
5
4
3
2
0
1
0
0
0
Symbol
Factory default
Access
REGION_ACTIVE[3:0]
0
1
1
1
0
0
0
0
0
R
R
R
R
R
R
R
R
The user OTP regions UF0, UF1, and F share a block of 16 registers. Prior to reading the
registers via any communication interface, the user must ensure that the desired OTP
registers are loaded into the readable registers. Below is the necessary procedure to
ensure proper reading of the UF0, UF1, and F registers.
1. Write the desired address range to be read to the REGION_LOAD[3:0] bits in the
UF_REGION_W register using one of the communication interfaces available via the
COMMTYPE register.
Table 48.ꢀREGION_LOAD Bit Definitions
REGION_LOAD[3:0]
OTP register addresses loaded into the readable registers
not applicable
0
0
0
0
0
0
0
1
not applicable
0010 through 1001
reserved
1
1
1
1
1
1
0
0
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
1
Address Range $A0 through $AF
Address Range $B0 through $BF
Address Range $C0 through $CF
Address Range $D0 through $DF
Address Range $E0 through $EF
Address Range $F0 through $FF
2. Add a delay (Refer to appropriate Application Note for specific communication
protocol for delay values)
3. Optional: Execute a register read of the UF_REGION_R register and confirm the
REGION_ACTIVE[3:0] bits match the values written to the REGION_LOAD[3:0] bits in
the UF_REGION_W register.
Table 49.ꢀREGION_ACTIVE Bit Definitions
REGION_ACTIVE[3:0]
OTP register addresses loaded into the readable registers
0
0
0
0
0
0
0
1
Load of OTP registers is in process
The contents of the shared registers has been over-written by
the user
0010 through 1001
not applicable
1
1
1
1
1
1
0
0
1
1
1
1
1
1
0
0
1
1
0
1
0
1
0
1
Address Range $A0 through $AF
Address Range $B0 through $BF
Address Range $C0 through $CF
Address Range $D0 through $DF
Address Range $E0 through $EF
Address Range $F0 through $FF
4. Execute a Register Read of the desired registers from the UF0, UF1 or F register
section. Complete all desired Register Reads of the selected UF Region.
FXPS7115D4
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© NXP B.V. 2019. All rights reserved.
Product data sheet
Rev. 3 — 5 December 2019
37 / 72
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