NXP Semiconductors
FXTH87E
FXTH87E, Family of Tire Pressure Monitor Sensors
Field
Description
SYNC Time Out Select — These two read/write bits select the period of time that the LFR will search for
a SYNC pattern in the data mode. If the SYNC pattern is not detected the LFR will be turned off after this
delay time. These time intervals are clocked by the internal LFRO clock. Reset clears TIMOUT bit.
1:0
00ꢀSYNC word is continuously searched — no timeout.
01ꢀSYNC search time set to nominal 8 milliseconds.
10ꢀSYNC search time set to nominal 24 milliseconds.
11ꢀSYNC search time set to nominal 48 milliseconds.
TIMOUT[1:0]
14.17.5 LFR status register (LFS, LPAGE = 0)
LFS contains the data ready status flags. It is only accessible when the LPAGE bit is
clear.
Table 114.ꢀLFR status register (LFS, LPAGE = 0) (address $0024)
Bit
R
7
6
5
4
3
2
1
LPSM
1
0
LFDRF
LFERF
LFCDF
LFIDF
LFOVF
LFEOMF
0
LFIAK
0
W
Reset
0
0
0
0
0
0
= Reserved
Table 115.ꢀLFS register field descriptions
Field
Description
LF Data Ready Flag — This read-only status flag is set when a complete byte of data has been received by
the LFR. An interrupt is sent to the MCU if the LFDRIE bit is set. Clear LFDRF by writing a one to the LFIAK
bit or reading the LFDATA register. LFDRF is also cleared by reset.
7
LFDRF
0ꢀNo new data in LFDATA register.
1ꢀA new byte of data has been received and can be read from the LFDATA register.
LF Receive Error Flag — In data receive mode, this read-only status flag is set when a non-standard bit
time is detected in the Manchester data mode. Any received data bits before the error occurs are placed in
the data buffer. In carrier detect mode, this read-only status flag is not used and remains clear. An interrupt
is sent to the MCU if the LFERIE bit is set. Clear LFERF by writing a one to the LFIAK bit. LFERF is also
cleared by reset.
6
LFERF
0ꢀNormal operation.
1ꢀError detected in the Manchester data mode.
LF Carrier Pulse Detect Flag — In carrier detect mode, this read-only status flag is set when the number
of consecutive carrier validations set by the LFCC bits in is reached. Note that the LFCC function is not
working if TOGMOD = 1. Clear LFCDF by writing a one to the LFIAK bit. LFCDF is also cleared by reset.
5
LFCDF
0ꢀNormal operation.
1ꢀCarrier detection has occurred.
LF ID Detect Flag — In data receive mode, this read-only status flag is set when the received ID matches
the stored value. This interrupt can be generated even if no data bits follow the ID. An interrupt is sent to the
MCU if the LFIDIE bit is set. Clear LFIDF by writing a one to the LFIAK bit. LFIDF is also cleared by reset.
4
LFIDF
0ꢀNormal operation.
1ꢀwakeup ID has been detected.
FXTH87ERM
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2019. All rights reserved.
Reference manual
Rev. 5.0 — 4 February 2019
127 / 183
NXP [ NXP ]
